Re: [ECOS] eCos port for S3C44B0 ARM processor

[Arun SR <aruns_r at yahoo dot com>]

Thanks for the reply.
So does this mean that I should configure the
interrupt
controller in non-vectored mode and not in vectored
mode?

Arun.

--- Andrew Lunn <andrew dot lunn at ascom dot ch> wrote:
> On Thu, Apr 03, 2003 at 04:33:23AM -0800, Arun SR
> wrote:
> > 
> > Hi,
> > 
> > I am trying to port eCos for S3C44B0 ARM variant.
> > This processor has an interrupt controller which
> > which uses vectored interrupt mode for IRQ
> interrupts.
> > So instead of one interrupt source for IRQ, 26
> sources
> > of interrupt are generated and the vector table
> should
> > have entries for all these sources.
> > 
> > To do the port, should I change the
> > arm/arch/current/src/vectors.S file? Or is there
> any
> > other way to achieve this?
> > What are the changes needed to do this port?
> 
> Thats normal for the ARM. Take a look at say the
> EBSA HAL. It has a
> similar interrupt controller. The interrupt VSR
> handler reads the
> controllers registers and then calls the correct
> ISR. You should not
> need to modify vectors.S.
> 
>             Andrew


__________________________________________________
Do you Yahoo!?
Yahoo! Tax Center - File online, calculators, forms, and more
http://tax.yahoo.com

-- 
Before posting, please read the FAQ: http://sources.redhat.com/fom/ecos
and search the list archive: http://sources.redhat.com/ml/ecos-discuss