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Re: Stack access violations in eCos


Nick Garnett wrote:
Jonathan Larmour <jifl at eCosCentric dot com> writes:


One _potential_ problem is that some align the stack to say 16 byte
alignment *but* then go and take off some space for a saved context -
normally sizeof(HAL_SavedRegisters) but there are some differences in
different architectures. The result is something that may now only be
4 byte aligned, which may cause problems for those archs that need
more, most obviously FP doubles being 8 byte aligned.


In theory the size of HAL_SavedRegisters should preserve the alignment
after being pushed on to the stack. The MIPS structures even has some
padding to ensure this. But we only need to keep the alignment of the
fields within the structure.

Mostly - the alignment constraints of a CYG_WORD64 may not be the same as a double, but that just requires care by the HAL author. The question is whether that care has been taken everywhere :-).


> Nothing is going to be pushed on top of
it since this is always the "top" object on the stack during context
switch. The 16 byte alignment is what we need to stack to be after the
context is restored.

Yep - twas my point. For example MIPS does indeed do this right:


_sp_ = _sp_ & 0xFFFFFFF0;

_regs_ = (HAL_SavedRegisters *)(((_sp_) - sizeof(HAL_SavedRegisters))&0xFFFFFFF0); \

but PowerPC has
register CYG_WORD _sp_ = (((CYG_WORD)_sparg_) &~15) - CYGARC_PPC_STACK_FRAME_SIZE;


which _might_ be right but might not - the ~15 implies it should be 16 byte aligned, but since CYGARC_PPC_STACK_FRAME_SIZE is 56 which isn't a multiple of 16, it's only going to end up being 8 byte aligned.

Interrupts and exceptions usually drop the stack by an exception
decrement value, which is sizeof(HAL_SavedRegisters) plus a safety
margin plus some padding to align it correctly.

You hope :-).


For SH at least, it didn't even have the init context right, so who knows about further context saves (and it turns out SH was Robert's target after all!).

Jifl
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