RE: [ECOS] ARM - RAM region at other address than 0

["Doyle, Patrick" <WPD at dtccom dot com>]

I glanced at the '5471 data manual and I don't see the "mechanism for
swapping ROM and SDRAM at address 0" that I was expecting to see... Hmmm....
Perhaps you should ask TI about this.  eCos really likes to see interrupt
vectors in RAM.  Does anybody have any idea what uClinux does about this?  I
expect it would want to see interrupt vectors in RAM as well... Perhaps they
just pay the price of a double vector.

--wpd


> -----Original Message-----
> From: Backhaus Willy [mailto:w.backhaus@newage-avkseg.com] 
> Sent: Monday, May 19, 2003 10:25 AM
> To: ecos-discuss@sources.redhat.com
> Subject: RE: [ECOS] ARM - RAM region at other address than 0
> 
> 
> hello,
> 
> > -----Original Message-----
> > From: Doyle, Patrick [mailto:WPD@dtccom.com]
> > Sent: Monday, May 19, 2003 4:03 PM
> > To: 'Backhaus Willy'; ecos-discuss@sources.redhat.com
> > Subject: RE: [ECOS] ARM - RAM region at other address than 0
> >
> >
> > I am pretty sure that the '5471 offers a mechanism for
> > swapping ROM and
> > SDRAM at address 0.  I haven't looked at it in ages, but this
> > is a common
> > "problem" with ARM based processors and they share a common
> > solution -- the
> > ability to swap what shows up at address 0.
> 
> 
> I really don't know how! I think it can neither swap chip selects in
> general, without external logic. and it can only boot from 
> chip select 0
> that is hard wired to address 0.
> 
> Regards,
> 
> Willy
> 
> 
> 
> 
> 
> 
> > > -----Original Message-----
> > > From: Backhaus Willy [mailto:w.backhaus@newage-avkseg.com]
> > > Sent: Monday, May 19, 2003 9:26 AM
> > > To: ecos-discuss@sources.redhat.com
> > > Subject: [ECOS] ARM - RAM region at other address than 0
> > >
> > >
> > > hello,
> > >
> > > we have an board with an ARM7TDMI (Texas Instruments -
> > > TMS320VC5471) core
> > > where the ROM (flash) starts at address 0 and RAM (actually
> > > SDRAM) beginns
> > > at address 0x10000000. this mapping can't be changed. I saw
> > > in vectors.s
> > > (for ARM) that, it is presumed that the RAM region always
> > > starts at address
> > > 0. some of the exception vectors are copied from the
> > > __exception_vectors
> > > label to address 0 + offset.
> > >
> > > to port eCos, do I have to change vectors.s to copy the
> > > __exception_handlers
> > > to other address than 0? or it's possible to obtain this with
> > > a processor
> > > specific HAL?
> > >
> > > thank you.
> > >
> > > Regards,
> > >
> > > Backhaus Willy
> > >
> > >
> > > --
> > > Before posting, please read the FAQ:
> > > http://sources.redhat.com/fom/ecos
> > > and search the list
> > > archive: http://sources.redhat.com/ml/ecos-discuss
> > >
> >
> 
> 
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