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RE: EDB7312(ARM720T) interrupts
- From: Gary Thomas <gary at mlbassoc dot com>
- To: Aaron Case <aaron dot case at dynazign dot com>
- Cc: Andrew Lunn <andrew at lunn dot ch>,Ecos-Discuss <ecos-discuss at sources dot redhat dot com>
- Date: 17 Nov 2003 09:02:08 -0700
- Subject: RE: [ECOS] EDB7312(ARM720T) interrupts
- Organization: MLB Associates
- References: <GBEOKKOEOGFDMKDFCHIMAENBCAAA.aaron.case@dynazign.com>
On Mon, 2003-11-17 at 08:57, Aaron Case wrote:
> Hello,
>
> For purposes of updating the list I see now why it didnt work. I used the
> interrupt vector instead of the handle in the cyg_interrupt_attach() call.
> Refer to the bogus code I posted in the previous listing. Opps.
>
I'm curious how you found this? by inspection? did you try enabling
asserts?
> thanks,
> Aaron Case
>
> -----Original Message-----
> From: Andrew Lunn [mailto:andrew@lunn.ch]
> Sent: Friday, November 14, 2003 5:13 PM
> To: Aaron Case
> Cc: Gary Thomas; Ecos-Discuss
> Subject: Re: [ECOS] EDB7312(ARM720T) interrupts
>
>
> On Fri, Nov 14, 2003 at 05:07:29PM -0500, Aaron Case wrote:
> > Gary,
> >
> > Many thanks, that cleared up my understanding of eCos interrupts a great
> > deal. Although, I still cant seem to achieve software connectivity with
> the
> > eCos interrupt model.
> >
> > While testing my interrupt code I have observed that I can assert bits in
> > the interrupt status register by sending characters to a UART. As well as
> > enabling them with cyg_interrupt_unmask() call(see below).
> >
> > I, however, have not be able to get the ISR(and thus DSR) to execute(via
> > break points with my MAJIC ICE).
> >
> > In the case of the UART1 RX interrupt, I can send a character, verify its
> > arrival at the buffer and FIFO, but no ISR or DSR is executed. Im assuming
> > the problem is my software configuration(which is REALLY close to the
> Massa
> > text). See code below.
>
> I don't see anywhere in your code where you program the serial chip to
> actually enable it to generate interrupts. Also, does eCos provide a
> serial driver for this chip? If so, that driver may already have the
> interrupt.
>
> Andrew
--
Gary Thomas <gary@mlbassoc.com>
MLB Associates
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