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Can we add the intel npe package to the latest sources? (was Re: Problems programming Intel's J3 Stratoflash chip)
- From: "Krishna Ganugapati" <krishnag at marakicorp dot com>
- To: "Mark Salter" <msalter at redhat dot com>,<lgagne at yahoo dot com>
- Cc: <ecos-discuss at sources dot redhat dot com>
- Date: Fri, 11 Jun 2004 09:40:30 -0700
- Subject: [ECOS] Can we add the intel npe package to the latest sources? (was Re: [ECOS] Problems programming Intel's J3 Stratoflash chip)
- References: <20040608184330.67693.qmail@web50807.mail.yahoo.com> <20040608192009.422807907B@deneb.localdomain>
Hello,
I'm using the latest cvs sources and building redboot for a custom ixp425
board. We're using the npes on the ixp425 and have downloaded the npe
packages from Intel. On reading the instructions from Intel it says that we
need to download the sources from Redhat(which includes fixes for block lock
status bits the StrataFlash 28F128J3(C)). Once that is done, we're supposed
to just add the npe package to these sources using ecosadmin.tcl.
My questions:
1)I'd like to use the latest cvs sources - I'm integrating some of the pci
ide support and other stuff.
Can I just add the npe package directly to the cvs sources and work off of
that? Has anyone done this and can vouch for the npe stuff working off their
cvs built Redboot images?
Note: I was successfully able to add the npe package direct to my anonymous
cvs tree..(but that doesn't necessarily mean that the two are compatible)
2)I've seen a few postings (one from Mark Salter saying that the block lock
status bits fix for the J3C will be checked in to the latest sources - has
this been done? I have ye to ssync my source tree - it has been a few months
now and was wondering whether this has been done?
3) When Intel says the Redboot do they mean the cvs sources...
Thanks!
Krishna
-------------------------------------------------
----- Original Message -----
From: "Mark Salter" <msalter@redhat.com>
To: <lgagne@yahoo.com>
Cc: <ecos-discuss@sources.redhat.com>
Sent: Tuesday, June 08, 2004 12:20 PM
Subject: Re: [ECOS] Problems programming Intel's J3 Stratoflash chip.
> >>>>> Louis Gagne writes:
>
> > Intel has recently bumped up their revision of the
> > 128Mbit J3 Stratoflash chip (28F128J3). My Redboot
> > code handled the J3A version just fine, but with the
> > J3C version I get errors programming it. The error is
> > 0x92. This error persists even if I unlock the
> > sectors before trying to program the chip.
>
> > Has anyone else run into this issue? If so, were you
> > able to overcome the problem? How did you resolve it?
>
> This should have been fixed in CVS with this (if its the bug
> I'm thinking of):
>
> 2003-10-29 Jonathan Larmour <jifl@eCosCentric.com>
>
> * src/flash_unlock_block.c (flash_unlock_block): test lock bit
> explicitly - newer flash parts use the reserved bits in the
> returned data.
>
> --Mark
>
>
>
> --
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