This is the mail archive of the ecos-discuss@sourceware.org mailing list for the eCos project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Question about interrupt trigger mode.


Hi,

My target uses SMSC LAN91C111 chip,CPU is SH7709S.
As ethernet interrupt,uses IRQ3 line.
I build "net" template,eCos source is updated by CVS checkout.

Please help me next 2 questions.
(1)
When IRQ3 aserted,enter into ISR routine,so far so good.
But although IRQ3 line continually hold assert-state(LOW),
and never chang to OFF(HIGH)state,ISR is repeatedly entered.

My question is,if interrupt trigger mode is setted edge trigger mode,
ISR routine is only entered once,isn't it ?

I assume trigger mode is setted by next routine.
packages\kernel\current\src\intr\intr.cxx HAL_INTERRUPT_CONFIGURE( vector, level, up );
or Cyg_Interrupt::configure_interrupt routine.


I checked source but never found using HAL_INTERRUPT_CONFIGURE or Cyg_Interrupt::configure_interrupt.
Is it only setted by default ?


I like to quarantee it is working egde trigger mode.
Could I know by cheching global area ?
How should I do to be confirmed that ?

(2)
After  IRQ3 was aserted,does eCos's SMSC LAN91C111 driver delete factors
causing IRQ3 toward LAN chip ?
If it does,and it is possible,please let me know where it is done ?
Or is it user's responsibility to do in ISR ?

Please enlighten me.

Masahiro Ariga


-- Before posting, please read the FAQ: http://ecos.sourceware.org/fom/ecos and search the list archive: http://ecos.sourceware.org/ml/ecos-discuss


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]