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rename CYG_HAL_STARTUP_RAM to CYG_HAL_STARTUP_REDBOOTRAM


Hello,

In my view the CYG_HAL_STARTUP_RAM startup mode does not say what it really is, in reality it is CYG_HAL_STARTUP_REDBOOTRAM: a RAM mode ecos does not initialize the virtual vector table because it supposes that RedBoot has done that. Indeed, when debugging with RedBoot, you want to define with RedBoot to where the (diag_)printf is sent to, and when loading a RAM image in RedBoot, that should not be changed.

But we use a JTAG debugger, that directly loads the image into RAM. Therefore, the virtual vector table is not initialized, and the (diag_)printf statements do not work and let the SW crash.
The best thing would be to add a new startup mode to ecos: CYG_HAL_STARTUP_RAM next to the existing (renamed) CYG_HAL_STARTUP_REDBOOTRAM.
What do you think?


For the moment, to be able to work with the JTAG debugger, I do it with a trick:
- I use the CYG_HAL_STARTUP_ROMRAM startup mode, because the linker files (.ldi) are to good ones
- but in my hal_platform_setup, I removed the copy code from ROM to RAM.
This works.


Kind regards,

--
Jürgen Lambrecht
R&D Engineer
Televic Transport Systems
http://www.televic.com
Televic NV / SA (main office)  	
Leo Bekaertlaan 1
B-8870 Izegem
Tel: +32 (0)51 303045
Fax: +32 (0)51 310670


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