This is the mail archive of the
ecos-discuss@sourceware.org
mailing list for the eCos project.
RE: Re: Uart missing chars when in Release
- From: "Laurie Gellatly" <laurie dot gellatly at netic dot com>
- To: <ecos-discuss at sources dot redhat dot com>
- Date: Mon, 28 Jan 2008 16:53:22 +1100
- Subject: RE: [ECOS] Re: Uart missing chars when in Release
Hi Grant,
Reading the LPC manual I thought that just looping thru reading
as many chars as were available could (if a new char arrived
while looping) remove a newly arrived OE. The original code loops
reading the LSR to check for any chars available which also clears
any OE that might have happened after the original interrupt and
while you were looping. I changed the RDA case to just read a
threshold full (not touching LSR) so that it would preserve the
error till interrupts were enabled again.
I can see I misunderstood you. I checked out a
fresh copy via CVS and ser_16x5x.c is what I started from.
I just changed the BCFG for the RAM bank to be make accessing RAM as
slow as the flash. Running the test again did produce just a few errors.
RAM is normally 15ns and flash 70ns on my board.
I then slowed comms to 9600 baud and that works perfectly with code
running from flash.
So, how would you approach this now?
Thanks ...Laurie:{)
--
Before posting, please read the FAQ: http://ecos.sourceware.org/fom/ecos
and search the list archive: http://ecos.sourceware.org/ml/ecos-discuss