[ECOS] I²C duty cycle configuration problem on LPC2106

[Alexandre <thekyz at gmail dot com>]

Hi everyone,

I'm trying to configure the duty cycle for a master I²C driver on an
LPC2106 platform.
My problem is that the configuration of the duty cycle in my
microcontroller's registers does not work like it should/would.

I'd like an I²C bus speed of 100Khz for a VPB Clock Divider = 4 and a
cristal oscillation frequency of 14 MHz
VPB clock divier is configured at 4 in my .ecc file, and the cristal
frequency is 14.745.600

So:
(SCLL + SCLH) = (FOSC /4) / 100000 = 38

Which means 19 for SCLL and SCLH since i want equal time for both.

HAL_WRITE_UINT8( CYGARC_HAL_LPC2XXX_REG_I2_BASE +
CYGARC_HAL_LPC2XXX_REG_I2SCLL, 19 );
HAL_WRITE_UINT8( CYGARC_HAL_LPC2XXX_REG_I2_BASE +
CYGARC_HAL_LPC2XXX_REG_I2SCLH, 19 );

Yet, with this configuration, a bit is 700µs long whereas it should be
around 10µs (measured with a logic analyzer).

Am I missing something in the configuration ?

Thanks for your time reading me,

Alex

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