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Re: LPC2XXX watchdog feeds and interrupts
- From: Sergei Gavrikov <sergei dot gavrikov at gmail dot com>
- To: Laurie Gellatly <laurie dot gellatly at netic dot com>
- Cc: 'eCos discuss-list' <ecos-discuss at ecos dot sourceware dot org>
- Date: Mon, 26 Oct 2009 22:40:40 +0200
- Subject: Re: [ECOS] LPC2XXX watchdog feeds and interrupts
On Mon, Oct 26, 2009 at 08:58:19PM +1100, Laurie Gellatly wrote:
> Hi All, I using an ARM 7 (LPC2212) based on an eCosCentric build. It
> appears that watchdog feeds are done with interrupts enabled yet the
> NXP manual warns against leaving interrupts enabled during a feed
> sequence (and I'm pretty sure I've seen the consequences). Firstly,
> have I missed something? Are interrupts disabled and I just don't
> see where when I call watchdog_reset() OR should I be adding
> cyg_interrupt_disable() and cyg_interrupt_enable() calls around the
> feed sequence in watchdog_lpc2xxx.cxx
>
> Thanks ...Laurie:{)
Hello Laurie,
I found no any global interrupt disabling/enabling workaround for eCos
io/watchdog *::reset. More that the most targets as I could see have a
peace with CPU's watchdog with a single atomic write, but NXP and some
other targets claim two writes (!atomic operation): devs/watchdog/*
Well, NXP points on such a claim, for example, in this application
note
http://www.standardics.nxp.com/support/documents/microcontrollers/pdf/an10414.pdf
and in their other data sheets. Well, may be that is rare condition:
to break two sequenced writes, but safety is safety :-) Could you
provide a patch for the issue, please`?
IMO, you would add some CDL in devs/watchdog/arm/lpc2xxx/*/*, e.g.
CYGOPT_DEVICES_WATCHDOG_ARM_LPC2XXX_RESET_SAFE to wrap that reset,
well, to add something likes the below
int old;
HAL_DISABLE_INTERRUPTS( old );
/* Feed magic values to reset the watchdog. */
/* ... */
HAL_RESTORE_INTERRUPTS( old );
But, as I could understand, you pointed on eCosCentric build.
HTH
Sergei
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