This is the mail archive of the ecos-discuss@sourceware.org mailing list for the eCos project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: ecos bring up on s5pc100(cortex-a8)


Stefan Sommerfeld wrote:

>>> The Freescale i.MX51 implementation (which is a Cortex-A8 CPU) is based on eCos
>>> ARM/ARM9 HAL's. I would suggest starting there instead of creating a new HAL.
>> That really doesn't make much since to me. ARM9s use the ARMv4T and
>> ARMv5T(E) instruction sets. Those are both Thumb only and obviously
>> lack improvements and extensions from the ARMv7(T) instruction set. I
>> suppose if you only want stripped down and Thumb only code, then that
>> would work. However, if you intend on actually using anything from
>> ARMv7 or some of the other features of a Cortex-A8 (multi-core
>> perhaps) that you would need to at least turn on the necessary
>> compiler flags.
>>
>> The cortexm hal seems like a closer match to me. Although, after
>> looking at the code, it appears to be very minimal at the moment.
>>
> eCos runs anything without thumb code and it runs fine here. But if you like to
> do a cortex-a HAL, I would love to support you. Especially for cortex-a9
> multicores it will be important.

Please note that eCos on Cortex-A was discussed some time ago on this
list in the context of a proposed port to OMAP3530. Ref:

  http://ecos.sourceware.org/ml/ecos-discuss/2009-05/msg00089.html

John Dallaway
eCos maintainer

-- 
Before posting, please read the FAQ: http://ecos.sourceware.org/fom/ecos
and search the list archive: http://ecos.sourceware.org/ml/ecos-discuss


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]