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Question on PowerPC CYG_HAL_STARTUP_ROMRAM code


In the file /hal/powerpc/csb281/v3_0/src/csb281.S there is
this fragment from hal_hardware_init:

#ifdef CYG_HAL_STARTUP_ROMRAM
        // Copy image from ROM to RAM
        mflr    r3              
        lwi     r4,0xFF000000
        lwi     r5,0x00FFFFFF   // ROM/FLASH base
        and     r3,r3,r5        // segment relative
        lwi     r6,_hal_hardware_init_done
        mtlr    r6
        sub     r6,r3,r6        // Absolute address
        add     r6,r6,r4        // FLASH address
        lwi     r7,0            // where to copy to
        lwi     r8,__ram_data_end
10:     lwz     r5,0(r6)
        stw     r5,0(r7)
        addi    r6,r6,4
        addi    r7,r7,4
        cmplw   r7,r8
        bne     10b
#endif

If I read this code correctly, the start destination address is 0 in r7,
which is the start
of the vector table. r6 needs to be pointing to the start of the vector
table in ROM, but I don't
understand how this is done.

In /hal/powerpc/rattler/v3_0/src/rattler.S there is
this code segment in hal_hardware_init:

#ifdef CYG_HAL_STARTUP_ROMRAM
        // Copy image from ROM to RAM
        mflr    r3              
        lwi     r4,(CYGMEM_REGION_rom&0xFE000000)
        lwi     r5,0x01FFFFFF   // ROM/FLASH base
        and     r3,r3,r5        // segment relative
        lwi     r6,_hal_hardware_init_done
        mtlr    r6
        sub     r6,r3,r6        // Absolute address
        add     r6,r6,r4        // FLASH address
        lwi     r7,0            // where to copy to
        lwi     r8,__ram_data_end
10:     lwz     r5,0(r6)
        stw     r5,0(r7)
        addi    r6,r6,4
        addi    r7,r7,4
        cmplw   r7,r8
        bne     10b
#endif              

is similar code to the csb281.

I am assuming this code works, as it appears in to instances,
but I can't figure out how the source and destination are aligned
to perform the copy from ROM to RAM correctly.

The code I don't understand is:
	sub	r6,r3,r6
	add	r6,r6,r4



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