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Re: Re: reboot is slow
Hi,
In vectors.S you have call to hal_cache_init()
which in turn calls hal_c_cache_init
The last one calls to dcache init and icache init and only after it
enables the caches by setting KO in config register.
Check that your clear Taglo/Taghi and tagd1/tagd2 (mtc0 %zero %28/29
2) before the invalidate loop, check your MIPS SUM doc to find the
exact registers you have.
What is the the address mapping? can it be that you are running from KSEG1?
Elad
On Fri, Jan 6, 2012 at 12:20 AM, Grant Edwards
<grant.b.edwards@gmail.com> wrote:
> On 2012-01-05, linux.chips <linux.chips@gmail.com> wrote:
>
>> the caches are enabled (typing cache in the prompt tells me it on).
>
> If the HAL code is broken somehow, it might not be telling the truth.
>
>> i am not sure where to find the memory initialization, currently
>> looking for it. the cpu clock is tunable as far as i know, i can see
>> options for cpu clock selections in the cdl files. how can i verify
>> the initialization and cpu clock are correct?
>
> On all the parts I've ever used, there has been a way to configure the
> hardware to output a clock signal on one of the peripheral pins (if
> not the CPU clock then at least something with a known ratio to the
> CPU clock). ?I enable that feature, then use a 'scope to verify the
> clock frequency.
>
> --
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> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?at ? ? ? ? ? ? ? American teens wearing
> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?gmail.com ? ? ? ? ? ?MADRAS shorts and "Flock of
> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? Seagulls" HAIRCUTS!
>
>
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