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Interrupt stacking issues
- From: Alan Bowman <alan dot michael dot bowman at gmail dot com>
- To: ecos-discuss at ecos dot sourceware dot org
- Date: Thu, 19 Jul 2012 10:46:18 +0100
- Subject: [ECOS] Interrupt stacking issues
I am using a board based upon an STM3210E development board, only with
the processor clocked much slower (8MHz). I am seeing problems with
interrupt handling when using the serial ports. I believe that my
system should be fast enough to handle the data coming in.
Recently, I started getting assertions that a stack base was corrupt.
It turns out that the thread that is running when characters arrive at
the serial port has many instances of the ISR stacked one on top the
other until the stack overflows. I understand that the ISR uses the
stack of the running thread, but I can't see how the same ISR can call
enough times until the stack overflows.
Since the stack check code is being asserted, I can see that the
PendSV bit is being set, and the scheduler is starting the context
switch - so the ISR itself is running to completion. This also seems
to be quite timing dependent - when I have a setup that sees the
failure, it's quite consistent as soon as a modest amount of data is
written. However, inserting a few lines of debugging code into ISRs
can make the issue (apparently) vanish.
Has anyone else had problems with recurring ISRs like this? I'm not
sufficiently clear on the inner workings of the Cortex port to be able
to see if this is a problem with all interrupts, the serial ports or
something that I've done. The stack dump doesn't enlighten me much
(beyond showing what seems to be repetition of the ISR call and
surrounding code), but I can post a printout if anyone thinks it would
help.
Thanks in advance
Alan Bowman
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