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Samsung SNDS100 Flash Support


The enclosed patches and attached files add flash support for the Samsung
SNDS100 development board.  Specifically, support for the Winbond W29EE011
flash chips.


This adds the Winbond W29EExxx flash driver and flash support for
the Samsung SNDS100 development board to ecos.db.

Index: packages/ecos.db
===================================================================
RCS file: /cvs/ecos/ecos/packages/ecos.db,v
retrieving revision 1.75
diff -u -5 -p -r1.75 ecos.db
--- packages/ecos.db	18 Oct 2002 16:56:52 -0000	1.75
+++ packages/ecos.db	29 Oct 2002 23:27:44 -0000
@@ -190,18 +190,38 @@ package CYGPKG_DEVS_FLASH_ATMEL_AT29CXXX
         description "
            This package contains hardware support for Atmel AT29Cxxxx
            flash memory devices."
 }
 
+package CYGPKG_DEVS_FLASH_WINBOND_W29EEXXX {
+	alias 		{ "Support for Winbond W29EExxx flash memory"
flash_winbond_w29eexxx }
+	directory	devs/flash/winbond/w29eexxx
+	script		flash_winbond_w29eexxx.cdl
+	hardware
+        description "
+           This package contains hardware support for Winbond W29EExxx
+           flash memory devices."
+}
+
 package CYGPKG_DEVS_FLASH_ARM_PID {
 	alias 		{ "Support for flash memory on ARM/PID board"
flash_arm_pid }
 	directory	devs/flash/arm/pid
 	script		flash_arm_pid.cdl
 	hardware
         description "
            This package contains hardware support for flash memory
 	   on the ARM PID platform."
+}
+
+package CYGPKG_DEVS_FLASH_ARM_SNDS {
+	alias 		{ "Support for flash memory on Samsung SNDS100
board" flash_arm_snds }
+        directory	devs/flash/arm/snds
+        script		flash_arm_snds.cdl
+        hardware
+        description "
+           This package contains hardware support for flash memory
+	   on the Samsung SNDS100 platform."
 }
 
 package CYGPKG_DEVS_FLASH_SH_EDK7708 {
 	alias 		{ "Support for flash memory on Hitachi/EDK7708
board" flash_sh_edk7708 }
 	directory	devs/flash/sh/edk7708





This enables the endian CDL option for the Samsung SNDS100 development
board package.


Index: packages/hal/arm/snds/current/cdl/hal_arm_snds.cdl
===================================================================
RCS file:
/cvs/ecos/ecos/packages/hal/arm/snds/current/cdl/hal_arm_snds.cdl,v
retrieving revision 1.2
diff -u -5 -p -r1.2 hal_arm_snds.cdl
--- packages/hal/arm/snds/current/cdl/hal_arm_snds.cdl	23 May 2002 23:02:30
-0000	1.2
+++ packages/hal/arm/snds/current/cdl/hal_arm_snds.cdl	29 Oct 2002 23:27:48
-0000
@@ -67,11 +67,11 @@ cdl_package CYGPKG_HAL_ARM_SNDS {
     implements    CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT
     implements    CYGINT_HAL_DEBUG_GDB_STUBS
     implements    CYGINT_HAL_DEBUG_GDB_STUBS_BREAK
     implements    CYGINT_HAL_ARM_ARCH_ARM7
     implements    CYGINT_HAL_ARM_THUMB_ARCH
-    # FIXME: Add endian option
+    implements    CYGINT_HAL_ARM_BIGENDIAN
 
     define_proc {
         puts $::cdl_system_header "#define CYGBLD_HAL_TARGET_H
<pkgconf/hal_arm.h>"
         puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_H
<pkgconf/hal_arm_snds.h>"
         puts $::cdl_header ""




This fixes the synchronous DRAM initialization for the two
K4S641632D TC1L DRAM chips (16MByte) jumpered to DRAMCON0 at
JP1 (SDRAM position 0).  It also includes the patch from 
Jonathan Larmour to only include the startup code for the ROM
and ROMRAM versions.


Index: packages/hal/arm/snds/current/include/hal_platform_setup.h
===================================================================
RCS file:
/cvs/ecos/ecos/packages/hal/arm/snds/current/include/hal_platform_setup.h,v
retrieving revision 1.2
diff -u -5 -p -r1.2 hal_platform_setup.h
--- packages/hal/arm/snds/current/include/hal_platform_setup.h	23 May 2002
23:02:30 -0000	1.2
+++ packages/hal/arm/snds/current/include/hal_platform_setup.h	29 Oct 2002
23:27:48 -0000
@@ -70,11 +70,11 @@
 
 // Use relative branch since we are going to switch the address space
 // around.
 #define CYGSEM_HAL_ROM_RESET_USES_JUMP
 
-#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
+#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM)
 #define PLATFORM_SETUP1
\
         ldr     r1,=KS32C_IOPMOD
;\
         ldr     r2,=0xff /* set led display to output */
;\
         str     r2,[r1,#0x00]
;\
         LED     0xaa
;\
@@ -220,11 +220,11 @@
                  |(KS32C_REFEXTCON_TCHR_1C)
\
                  |(KS32C_REFEXTCON_REN)
\
                  |(KS32C_REFEXTCON_VSF)
\
                  |(KS32C_REFEXTCON_BASE))
;\
 
;\
-        /* Sync DRAM setup */
;\
+        /* Sync DRAM setup (2 K4S641632D TC1L chips = 16MByte) */
;\
         /* Flash is 16 bit, everything else 32 bit */
;\
         /* .long   KS32C_EXTDBWTH */
;\
 40:     .long  ( (KS32C_EXTDBWTH_16BIT<<KS32C_EXTDBWTH_DSR0_shift)
\
                 |(KS32C_EXTDBWTH_16BIT<<KS32C_EXTDBWTH_DSR1_shift)
\
                 |(KS32C_EXTDBWTH_32BIT<<KS32C_EXTDBWTH_DSR2_shift)
\
@@ -277,35 +277,35 @@
                 |((0x00000000 >> 16) << KS32C_ROMCON_BASE_shift)
\
                 |((0x00000000 >> 16) << KS32C_ROMCON_NEXT_shift))
;\
         /* .long   KS32C_DRAMCON0 */
;\
         .long  ( (KS32C_DRAMCON_RESERVED)
\
                 |(KS32C_DRAMCON_CAN_8)
\
-                |(KS32C_DRAMCON_TRP_4C)
\
+                |(KS32C_DRAMCON_TRP_2C)
\
                 |(KS32C_DRAMCON_TRC_2C)
\
                 |((0x00000000 >> 16) << KS32C_DRAMCON_BASE_shift)
\
-                |((0x00400000 >> 16) << KS32C_DRAMCON_NEXT_shift))
;\
+                |((0x01000000 >> 16) << KS32C_DRAMCON_NEXT_shift))
;\
         /* .long   KS32C_DRAMCON1 */
;\
         .long  ( (KS32C_DRAMCON_RESERVED)
\
                 |(KS32C_DRAMCON_CAN_8)
\
                 |(KS32C_DRAMCON_TRP_2C)
\
                 |(KS32C_DRAMCON_TRC_2C)
\
-                |((0x00400000 >> 16) << KS32C_DRAMCON_BASE_shift)
\
-                |((0x00800000 >> 16) << KS32C_DRAMCON_NEXT_shift))
;\
+                |((0x00000000 >> 16) << KS32C_DRAMCON_BASE_shift)
\
+                |((0x00000000 >> 16) << KS32C_DRAMCON_NEXT_shift))
;\
         /* .long   KS32C_DRAMCON2 */
;\
         .long  ( (KS32C_DRAMCON_RESERVED)
\
                 |(KS32C_DRAMCON_CAN_8)
\
                 |(KS32C_DRAMCON_TRP_2C)
\
                 |(KS32C_DRAMCON_TRC_2C)
\
-                |((0x00800000 >> 16) << KS32C_DRAMCON_BASE_shift)
\
-                |((0x00c00000 >> 16) << KS32C_DRAMCON_NEXT_shift))
;\
+                |((0x00000000 >> 16) << KS32C_DRAMCON_BASE_shift)
\
+                |((0x00000000 >> 16) << KS32C_DRAMCON_NEXT_shift))
;\
         /* .long   KS32C_DRAMCON3 */
;\
         .long  ( (KS32C_DRAMCON_RESERVED)
\
                 |(KS32C_DRAMCON_CAN_8)
\
                 |(KS32C_DRAMCON_TRP_2C)
\
                 |(KS32C_DRAMCON_TRC_2C)
\
-                |((0x00c00000 >> 16) << KS32C_DRAMCON_BASE_shift)
\
-                |((0x01000000 >> 16) << KS32C_DRAMCON_NEXT_shift))
;\
+                |((0x00000000 >> 16) << KS32C_DRAMCON_BASE_shift)
\
+                |((0x00000000 >> 16) << KS32C_DRAMCON_NEXT_shift))
;\
         /* .long   KS32C_REFEXTCON */
;\
         .long  (((2048+1-(8*CYGNUM_HAL_CPUCLOCK/1000000)) <<
KS32C_REFEXTCON_RCV_shift) \
                  |(KS32C_REFEXTCON_TRC_4C)
\
                  |(KS32C_REFEXTCON_REN)
\
                  |(KS32C_REFEXTCON_VSF)
\





The next three files add the rom section to the RAM configuration.


Index: packages/hal/arm/snds/current/include/pkgconf/mlt_arm_snds_ram.h
===================================================================
RCS file:
/cvs/ecos/ecos/packages/hal/arm/snds/current/include/pkgconf/mlt_arm_snds_ra
m.h,v
retrieving revision 1.1
diff -u -5 -p -r1.1 mlt_arm_snds_ram.h
--- packages/hal/arm/snds/current/include/pkgconf/mlt_arm_snds_ram.h	20
May 2002 22:22:22 -0000	1.1
+++ packages/hal/arm/snds/current/include/pkgconf/mlt_arm_snds_ram.h	29
Oct 2002 23:27:48 -0000
@@ -1,15 +1,20 @@
 // eCos memory layout - Tue Feb 29 14:11:30 2000
 
 // This is a generated file - do not edit
 
+#ifndef __ASSEMBLER__
 #include <cyg/infra/cyg_type.h>
 #include <stddef.h>
+#endif
 
 #define CYGMEM_REGION_ram (0)
 #define CYGMEM_REGION_ram_SIZE (0x01000000)
 #define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R |
CYGMEM_REGION_ATTR_W)
+#define CYGMEM_REGION_rom (0x1800000)
+#define CYGMEM_REGION_rom_SIZE (0x80000)
+#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R)
 #ifndef __ASSEMBLER__
 extern char CYG_LABEL_NAME (__heap1) [];
 #endif
 #define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1))
 #define CYGMEM_SECTION_heap1_SIZE (0x01000000 - (size_t) CYG_LABEL_NAME
(__heap1))
Index: packages/hal/arm/snds/current/include/pkgconf/mlt_arm_snds_ram.ldi
===================================================================
RCS file:
/cvs/ecos/ecos/packages/hal/arm/snds/current/include/pkgconf/mlt_arm_snds_ra
m.ldi,v
retrieving revision 1.2
diff -u -5 -p -r1.2 mlt_arm_snds_ram.ldi
--- packages/hal/arm/snds/current/include/pkgconf/mlt_arm_snds_ram.ldi	3
Oct 2002 16:19:48 -0000	1.2
+++ packages/hal/arm/snds/current/include/pkgconf/mlt_arm_snds_ram.ldi	29
Oct 2002 23:27:48 -0000
@@ -5,10 +5,11 @@
 #include <cyg/infra/cyg_type.inc>
 
 MEMORY
 {
     ram : ORIGIN = 0x000000, LENGTH = 0x01000000
+    rom : ORIGIN = 0x1800000, LENGTH = 0x80000
 }
 
 SECTIONS
 {
     SECTIONS_BEGIN
Index: packages/hal/arm/snds/current/include/pkgconf/mlt_arm_snds_ram.mlt
===================================================================
RCS file:
/cvs/ecos/ecos/packages/hal/arm/snds/current/include/pkgconf/mlt_arm_snds_ra
m.mlt,v
retrieving revision 1.1
diff -u -5 -p -r1.1 mlt_arm_snds_ram.mlt
--- packages/hal/arm/snds/current/include/pkgconf/mlt_arm_snds_ram.mlt	20
May 2002 22:22:22 -0000	1.1
+++ packages/hal/arm/snds/current/include/pkgconf/mlt_arm_snds_ram.mlt	29
Oct 2002 23:27:48 -0000
@@ -1,7 +1,8 @@
 version 0
 region ram 0 1000000 0 !
+region rom 1800000 80000 1 !
 section fixed_vectors 0 1 0 1 1 0 1 0 20 20 !
 section rom_vectors 0 1 0 1 1 1 1 1 20000 20000 text text !
 section text 0 4 0 1 0 1 0 1 fini fini !
 section fini 0 4 0 1 0 1 0 1 rodata rodata !
 section rodata 0 4 0 1 0 1 0 1 rodata1 rodata1 !




This adds the Winbond W29EE011 driver and the flash support for the
Samsung SNDS100 development board to the RedBoot RAM and ROM ecm
files.


Index: packages/hal/arm/snds/current/misc/redboot_RAM.ecm
===================================================================
RCS file:
/cvs/ecos/ecos/packages/hal/arm/snds/current/misc/redboot_RAM.ecm,v
retrieving revision 1.1
diff -u -5 -p -r1.1 redboot_RAM.ecm
--- packages/hal/arm/snds/current/misc/redboot_RAM.ecm	20 May 2002 22:22:22
-0000	1.1
+++ packages/hal/arm/snds/current/misc/redboot_RAM.ecm	29 Oct 2002 23:27:48
-0000
@@ -11,10 +11,12 @@ cdl_configuration eCos {
     description "" ;
     hardware    snds ;
     template    redboot ;
     package -hardware CYGPKG_HAL_ARM current ;
     package -hardware CYGPKG_HAL_ARM_SNDS current ;
+    package -hardware CYGPKG_DEVS_FLASH_WINBOND_W29EEXXX current ;
+    package -hardware CYGPKG_DEVS_FLASH_ARM_SNDS current ;
     package -template CYGPKG_HAL current ;
     package -template CYGPKG_INFRA current ;
     package -template CYGPKG_REDBOOT current ;
     package -template CYGPKG_ISOINFRA current ;
     package -template CYGPKG_LIBC_STRING current ;
Index: packages/hal/arm/snds/current/misc/redboot_ROM.ecm
===================================================================
RCS file:
/cvs/ecos/ecos/packages/hal/arm/snds/current/misc/redboot_ROM.ecm,v
retrieving revision 1.1
diff -u -5 -p -r1.1 redboot_ROM.ecm
--- packages/hal/arm/snds/current/misc/redboot_ROM.ecm	20 May 2002 22:22:22
-0000	1.1
+++ packages/hal/arm/snds/current/misc/redboot_ROM.ecm	29 Oct 2002 23:27:48
-0000
@@ -11,10 +11,12 @@ cdl_configuration eCos {
     description "" ;
     hardware    snds ;
     template    redboot ;
     package -hardware CYGPKG_HAL_ARM current ;
     package -hardware CYGPKG_HAL_ARM_SNDS current ;
+    package -hardware CYGPKG_DEVS_FLASH_WINBOND_W29EEXXX current ;
+    package -hardware CYGPKG_DEVS_FLASH_ARM_SNDS current ;
     package -template CYGPKG_HAL current ;
     package -template CYGPKG_INFRA current ;
     package -template CYGPKG_REDBOOT current ;
     package -template CYGPKG_ISOINFRA current ;
     package -template CYGPKG_LIBC_STRING current ;




This patch silences a compiler warning.  No code change.


Index: packages/hal/arm/snds/current/src/snds100_misc.c
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/arm/snds/current/src/snds100_misc.c,v
retrieving revision 1.2
diff -u -5 -p -r1.2 snds100_misc.c
--- packages/hal/arm/snds/current/src/snds100_misc.c	23 May 2002 23:02:30
-0000	1.2
+++ packages/hal/arm/snds/current/src/snds100_misc.c	29 Oct 2002 23:27:48
-0000
@@ -113,12 +113,12 @@ void hal_clock_initialize(cyg_uint32 per
 
 #ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT
     cyg_drv_interrupt_create(CYGNUM_HAL_INTERRUPT_EXT0,
                              99,           // Priority
                              0,            // Data item passed to interrupt
handler
-                             ks32c_abort_isr,
-                             0,
+                             (cyg_ISR_t *)ks32c_abort_isr,
+                             (cyg_DSR_t *)0,
                              &abort_interrupt_handle,
                              &abort_interrupt);
     cyg_drv_interrupt_attach(abort_interrupt_handle);
     cyg_drv_interrupt_unmask(CYGNUM_HAL_INTERRUPT_EXT0);
 #endif



 <<flash_arm_snds.tar.gz>> 
Jay Foster

Attachment: flash_arm_snds.tar.gz
Description: Binary data


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