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xscale ecc scrub fix


Index: hal/arm/xscale/verde/current/ChangeLog
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/arm/xscale/verde/current/ChangeLog,v
retrieving revision 1.8
diff -u -p -5 -r1.8 ChangeLog
--- hal/arm/xscale/verde/current/ChangeLog	12 Nov 2002 22:36:28 -0000	1.8
+++ hal/arm/xscale/verde/current/ChangeLog	24 Jan 2003 20:54:14 -0000
@@ -1,5 +1,12 @@
+2003-01-24  Mark Salter  <msalter@redhat.com>
+
+	* include/hal_verde.h: Add some arbitatration unit defines.
+	* src/verde_misc.c (_scrub_ecc): Make scrub an atomic operation on
+	the bus. Thanks to rickr@mn.rr.com for pointing out the need for
+	this.
+
 2002-11-12  Mark Salter  <msalter@redhat.com>
 
 	* include/hal_var_ints.h (CYGNUM_HAL_INTERRUPT_MSG_IBPQ): IRQ 26
 	belongs to messaging unit.
 
Index: hal/arm/xscale/verde/current/include/hal_verde.h
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/arm/xscale/verde/current/include/hal_verde.h,v
retrieving revision 1.4
diff -u -p -5 -r1.4 hal_verde.h
--- hal/arm/xscale/verde/current/include/hal_verde.h	19 Sep 2002 15:51:56 -0000	1.4
+++ hal/arm/xscale/verde/current/include/hal_verde.h	24 Jan 2003 20:54:32 -0000
@@ -6,11 +6,11 @@
 //
 //=============================================================================
 //####ECOSGPLCOPYRIGHTBEGIN####
 // -------------------------------------------
 // This file is part of eCos, the Embedded Configurable Operating System.
-// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Red Hat, Inc.
 //
 // eCos is free software; you can redistribute it and/or modify it under
 // the terms of the GNU General Public License as published by the Free
 // Software Foundation; either version 2 or (at your option) any later version.
 //
@@ -341,10 +341,29 @@
 #define	ISR_SADDR	0x0200  /* 1: I2C unit detected a 7-bit address matching the general call or ISAR */
 #define	ISR_ERROR	0x0400  /* Bit set by unit when a Bus Error detected */
 
 #define	IDBR_MASK	0x000000ff
 #define	IDBR_MODE	0x01
+
+// --------------------------------------------------------------------------
+// Arbitration (Chapter 11)
+#define ARB_IACR        REG32(0,0xffffe780)
+#define ARB_MTTR1       REG32(0,0xffffe784)
+#define ARB_MTTR2       REG32(0,0xffffe788)
+
+#define IACR_PRI_HIGH    0
+#define IACR_PRI_MED     1
+#define IACR_PRI_LOW     2
+#define IACR_PRI_OFF     3
+
+// macros to set priority for various units
+#define IACR_ATU(x)      ((x) << 0)
+#define IACR_DMA0(x)     ((x) << 4)
+#define IACR_DMA1(x)     ((x) << 6)
+#define IACR_CORE(x)     ((x) << 10)
+#define IACR_AAU(x)      ((x) << 12)
+#define IACR_PBI(x)      ((x) << 14)
 
 
 // --------------------------------------------------------------------------
 // Timers (Chapter 14)
 #define TU_TMR0	    REG32(0,0xffffe7e0)
Index: hal/arm/xscale/verde/current/src/verde_misc.c
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/arm/xscale/verde/current/src/verde_misc.c,v
retrieving revision 1.3
diff -u -p -5 -r1.3 verde_misc.c
--- hal/arm/xscale/verde/current/src/verde_misc.c	19 Sep 2002 15:51:56 -0000	1.3
+++ hal/arm/xscale/verde/current/src/verde_misc.c	24 Jan 2003 20:54:33 -0000
@@ -6,11 +6,11 @@
 //
 //==========================================================================
 //####ECOSGPLCOPYRIGHTBEGIN####
 // -------------------------------------------
 // This file is part of eCos, the Embedded Configurable Operating System.
-// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Red Hat, Inc.
 //
 // eCos is free software; you can redistribute it and/or modify it under
 // the terms of the GNU General Public License as published by the Free
 // Software Foundation; either version 2 or (at your option) any later version.
 //
@@ -124,12 +124,32 @@ hal_IRQ_handler(void)
 }
 
 static inline void
 _scrub_ecc(unsigned p)
 {
+    cyg_uint32 iacr;
+
+    // The following ldr/str pair need to be atomic on the bus. Since
+    // the XScale core doesn't support atomic RMW, we have to disable
+    // arbitration to prevent other bus masters from taking the bus
+    // between the the ldr and str.
+
+    // Disable internal bus arbitration for everything except the CPU
+    iacr = *ARB_IACR;
+    *ARB_IACR = IACR_ATU(IACR_PRI_OFF)  | IACR_DMA0(IACR_PRI_OFF) |
+  	        IACR_DMA1(IACR_PRI_OFF) | IACR_AAU(IACR_PRI_OFF)  |
+	        IACR_PBI(IACR_PRI_OFF)  | IACR_CORE(IACR_PRI_HIGH);
+
+    // drain write buffer
+    asm volatile ("mrc  p15,0,r1,c7,c10,4\n");
+    CPWAIT();
+
     asm volatile ("ldrb r4, [%0]\n"
 		  "strb r4, [%0]\n" : : "r"(p) : "r4");
+
+    // Restore normal internal bus arbitration priorities
+    *ARB_IACR = iacr;
 }
 
 static cyg_uint32
 mcu_ISR(cyg_vector_t vector, cyg_addrword_t data)
 {


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