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Atlas eCos support and GDB change



There are two things here:

1. The Atlas board now supports eCos properly. I'm still working on
   the ethernet driver.

2. The register handling in the GDB stub code for the MIPS32 variant
   has been changed to supply 32 bit registers rather than 64
   bit. This is a departure from the original code, which supported a
   target-specific version of GDB. This change allows us to use the
   public gcc 3.2.x compiler.

Both changes applied to trunk and 2.0 branch.



Index: arch/current/ChangeLog
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/mips/arch/current/ChangeLog,v
retrieving revision 1.67
diff -u -5 -r1.67 ChangeLog
--- arch/current/ChangeLog	31 Jan 2003 16:45:59 -0000	1.67
+++ arch/current/ChangeLog	27 Feb 2003 18:26:00 -0000
@@ -1,5 +1,11 @@
+2003-02-27  Nick Garnett  <nickg at calivar dot com>
+
+	* include/mips-stub.h: Disabled option that makes MIPS32 targets
+	use 64 bit registers in GDB protocol. The standard GDB does not
+	support this, only MIPS own version.
+
 2003-01-31  Mark Salter  <msalter at redhat dot com>
 
 	* src/hal_syscall.c (hal_syscall_handler): Let generic syscall code
 	handle exit.
 
Index: arch/current/include/mips-stub.h
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/mips/arch/current/include/mips-stub.h,v
retrieving revision 1.17
diff -u -5 -r1.17 mips-stub.h
--- arch/current/include/mips-stub.h	23 May 2002 23:03:22 -0000	1.17
+++ arch/current/include/mips-stub.h	27 Feb 2003 18:26:00 -0000
@@ -109,11 +109,11 @@
   #define REGSIZE(X) 8
   typedef unsigned long target_register_t;
 
   // We need to sign-extend the registers so GDB doesn't get confused.
   #define CYGARC_SIGN_EXTEND_REGISTERS
-#elif defined(CYGPKG_HAL_MIPS_MIPS32)
+#elif 0 //defined(CYGPKG_HAL_MIPS_MIPS32)
   // Even though we are only working with 32 bit registers, GDB expects 64 bits
   #define REGSIZE(X) 8
   typedef unsigned long target_register_t;
 
   // We need to sign-extend the registers so GDB doesn't get confused.
Index: atlas/current/ChangeLog
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/mips/atlas/current/ChangeLog,v
retrieving revision 1.7
diff -u -5 -r1.7 ChangeLog
--- atlas/current/ChangeLog	6 Aug 2002 16:00:13 -0000	1.7
+++ atlas/current/ChangeLog	27 Feb 2003 18:26:00 -0000
@@ -1,5 +1,16 @@
+2003-02-27  Nick Garnett  <nickg at calivar dot com>
+
+	* include/plf_intr.h: Defined CYGNUM_HAL_INTERRUPT_RTC to
+	counter/compare register interrupt. Added implementations of
+	HAL_INTERRUPT_MASK, HAL_INTERRUPT_UNMASK, and
+	HAL_INTERRUPT_ACKNOWLEDGE that will work in eCos rather than just
+	RedBoot.
+
+	* src/plf_misc.c (hal_platform_init): Changed spelling of eCos for
+	the LED to match the official typography.
+
 2002-08-06  Gary Thomas  <gary at chez-thomas dot org>
 2002-08-06  Motoya Kurotsu <kurotsu at allied-telesis dot co dot jp>	
 
 	* src/ser16c550c.c: I/O channel data can't be constant - contains
 	timeout information which can be changed.
Index: atlas/current/include/plf_intr.h
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/mips/atlas/current/include/plf_intr.h,v
retrieving revision 1.4
diff -u -5 -r1.4 plf_intr.h
--- atlas/current/include/plf_intr.h	23 May 2002 23:03:24 -0000	1.4
+++ atlas/current/include/plf_intr.h	27 Feb 2003 18:26:00 -0000
@@ -75,11 +75,11 @@
 
 #define CYGNUM_HAL_INTERRUPT_SER                 0
 #define CYGNUM_HAL_INTERRUPT_TIM0                1
 #define CYGNUM_HAL_INTERRUPT_2                   2
 #define CYGNUM_HAL_INTERRUPT_3                   3
-#define CYGNUM_HAL_INTERRUPT_RTC                 4
+#define CYGNUM_HAL_INTERRUPT_FPGA_RTC            4
 #define CYGNUM_HAL_INTERRUPT_COREHI              5
 #define CYGNUM_HAL_INTERRUPT_CORELO              6
 #define CYGNUM_HAL_INTERRUPT_7                   7
 #define CYGNUM_HAL_INTERRUPT_PCIA                8
 #define CYGNUM_HAL_INTERRUPT_PCIB                9
@@ -104,10 +104,12 @@
 #define CYGNUM_HAL_ISR_MAX                     24
 #define CYGNUM_HAL_ISR_COUNT                   25
 
 #define CYGNUM_HAL_INTERRUPT_DEBUG_UART        CYGNUM_HAL_INTERRUPT_SER
 
+#define CYGNUM_HAL_INTERRUPT_RTC CYGNUM_HAL_INTERRUPT_HW5
+
 #define CYGHWR_HAL_INTERRUPT_VECTORS_DEFINED
 
 #endif
 
 //--------------------------------------------------------------------------
@@ -117,18 +119,82 @@
 
 // Array which stores the configured priority levels for the configured
 // interrupts.
 externC volatile CYG_BYTE hal_interrupt_level[CYGNUM_HAL_ISR_COUNT];
 
-#define HAL_INTERRUPT_MASK( _vector_ )                       \
-    HAL_WRITE_UINT32( HAL_ATLAS_INTRSTEN, (1<<(_vector_)) );
-
-#define HAL_INTERRUPT_UNMASK( _vector_ )                     \
-    HAL_WRITE_UINT32( HAL_ATLAS_INTSETEN, (1<<(_vector_)) );
-
-#define HAL_INTERRUPT_ACKNOWLEDGE( _vector_ )                \
-{                                                            \
+#define HAL_INTERRUPT_MASK( _vector_ )                                  \
+{                                                                       \
+    cyg_uint32 __vector = _vector_;                                     \
+                                                                        \
+    if( (_vector_) < CYGNUM_HAL_INTERRUPT_HW1 )                         \
+        HAL_WRITE_UINT32( HAL_ATLAS_INTRSTEN, (1<<(_vector_)) );        \
+    else                                                                \
+    {                                                                   \
+        __vector -= (CYGNUM_HAL_INTERRUPT_HW1-1);                       \
+                                                                        \
+        asm volatile (                                                  \
+            "mfc0   $3,$12\n"                                           \
+            "la     $2,0x00000400\n"                                    \
+            "sllv   $2,$2,%0\n"                                         \
+            "nor    $2,$2,$0\n"                                         \
+            "and    $3,$3,$2\n"                                         \
+            "mtc0   $3,$12\n"                                           \
+            "nop; nop; nop\n"                                           \
+            :                                                           \
+            : "r"(__vector)                                             \
+            : "$2", "$3"                                                \
+            );                                                          \
+    }                                                                   \
+}
+
+#define HAL_INTERRUPT_UNMASK( _vector_ )                                \
+{                                                                       \
+    cyg_uint32 __vector = _vector_;                                     \
+                                                                        \
+    if( (__vector) < CYGNUM_HAL_INTERRUPT_HW1 )                         \
+    {                                                                   \
+        HAL_WRITE_UINT32( HAL_ATLAS_INTSETEN, (1<<(__vector)) );        \
+        __vector = 0;                                                   \
+    }                                                                   \
+    else                                                                \
+        __vector -= (CYGNUM_HAL_INTERRUPT_HW1-1);                       \
+                                                                        \
+    asm volatile (                                                      \
+        "mfc0   $3,$12\n"                                               \
+        "la     $2,0x00000400\n"                                        \
+        "sllv   $2,$2,%0\n"                                             \
+        "or     $3,$3,$2\n"                                             \
+        "mtc0   $3,$12\n"                                               \
+        "nop; nop; nop\n"                                               \
+        :                                                               \
+        : "r"(__vector)                                                 \
+        : "$2", "$3"                                                    \
+        );                                                              \
+}
+
+#define HAL_INTERRUPT_ACKNOWLEDGE( _vector_ )           \
+{                                                       \
+    cyg_uint32 __vector = _vector_;                     \
+                                                        \
+    if( __vector >= CYGNUM_HAL_INTERRUPT_HW1 )          \
+        __vector -= (CYGNUM_HAL_INTERRUPT_HW1-1);       \
+    else                                                \
+        __vector = 0;                                   \
+                                                        \
+    asm volatile (                                      \
+        "mfc0   $3,$13\n"                               \
+        "la     $2,0x00000400\n"                        \
+        "sllv   $2,$2,%0\n"                             \
+        "nor    $2,$2,$0\n"                             \
+        "and    $3,$3,$2\n"                             \
+        "mtc0   $3,$13\n"                               \
+        "nop; nop; nop\n"                               \
+        :                                               \
+        : "r"(__vector)                                 \
+        : "$2", "$3"                                    \
+        );                                              \
+                                                        \
 }
 
 #define HAL_INTERRUPT_CONFIGURE( _vector_, _level_, _up_ )   \
 {                                                            \
 }
Index: atlas/current/src/plf_misc.c
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/mips/atlas/current/src/plf_misc.c,v
retrieving revision 1.3
diff -u -5 -r1.3 plf_misc.c
--- atlas/current/src/plf_misc.c	23 May 2002 23:03:26 -0000	1.3
+++ atlas/current/src/plf_misc.c	27 Feb 2003 18:26:00 -0000
@@ -103,12 +103,12 @@
 #else
     HAL_WRITE_UINT32(HAL_DISPLAY_ASCIIPOS0, ' ');
     HAL_WRITE_UINT32(HAL_DISPLAY_ASCIIPOS1, ' ');
     HAL_WRITE_UINT32(HAL_DISPLAY_ASCIIPOS2, 'e');
     HAL_WRITE_UINT32(HAL_DISPLAY_ASCIIPOS3, 'C');
-    HAL_WRITE_UINT32(HAL_DISPLAY_ASCIIPOS4, 'O');
-    HAL_WRITE_UINT32(HAL_DISPLAY_ASCIIPOS5, 'S');
+    HAL_WRITE_UINT32(HAL_DISPLAY_ASCIIPOS4, 'o');
+    HAL_WRITE_UINT32(HAL_DISPLAY_ASCIIPOS5, 's');
     HAL_WRITE_UINT32(HAL_DISPLAY_ASCIIPOS6, ' ');
     HAL_WRITE_UINT32(HAL_DISPLAY_ASCIIPOS7, ' ');
 #endif
 
     // Set up eCos/ROM interfaces
Index: mips32/current/ChangeLog
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/mips/mips32/current/ChangeLog,v
retrieving revision 1.6
diff -u -5 -r1.6 ChangeLog
--- mips32/current/ChangeLog	21 Jan 2003 03:16:51 -0000	1.6
+++ mips32/current/ChangeLog	27 Feb 2003 18:26:01 -0000
@@ -1,5 +1,11 @@
+2003-02-27  Nick Garnett  <nickg at calivar dot com>
+
+	* cdl/hal_mips_mips32.cdl: Changed CYGPKG_HAL_MIPS_GDB_REPORT_CP0
+	to zero, from one, so that the GDB stubs work with the standard
+	GCC tools.
+
 2003-01-21  Tim Michals  <t dot michals at attbi dot com>
 
 	* cdl/hal_mips_mips32.cdl: Make endianness configurable.
 
 2002-05-24  Jesper Skov  <jskov at redhat dot com>
Index: mips32/current/cdl/hal_mips_mips32.cdl
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/mips/mips32/current/cdl/hal_mips_mips32.cdl,v
retrieving revision 1.5
diff -u -5 -r1.5 hal_mips_mips32.cdl
--- mips32/current/cdl/hal_mips_mips32.cdl	21 Jan 2003 03:16:51 -0000	1.5
+++ mips32/current/cdl/hal_mips_mips32.cdl	27 Feb 2003 18:26:01 -0000
@@ -98,11 +98,11 @@
         calculated {   CYGHWR_HAL_MIPS_MIPS32_ENDIAN == "Big"}
     }
 
     cdl_option CYGPKG_HAL_MIPS_GDB_REPORT_CP0 {
 	display "Report contents of CP0 to GDB"
-	calculated 1
+	calculated 0
     }
     
     define_proc {
         puts $::cdl_header "#include <pkgconf/hal_mips.h>"
     }


-- 
Nick Garnett                    eCos Kernel Architect
http://www.ecoscentric.com/     The eCos and RedBoot experts


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