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Updates for idt79s334a
- From: "Tim Michals" <t dot michals at attbi dot com>
- To: <ecos-patches at sources dot redhat dot com>
- Cc: "Kulkarni, Upendra" <Upendra dot Kulkarni at idt dot com>
- Date: Sun, 9 Mar 2003 23:02:16 -0600
- Subject: Updates for idt79s334a
Included are patches for idt79s334a (dual serial ports and gdb support)
Index: current/ChangeLog
===================================================================
RCS file:
/cvs/ecos/ecos/packages/devs/serial/mips/idt79s334a/current/ChangeLog,v
retrieving revision 1.1
diff -u -5 -p -r1.1 ChangeLog
--- current/ChangeLog 14 Feb 2003 01:44:03 -0000 1.1
+++ current/ChangeLog 10 Mar 2003 04:48:21 -0000
@@ -1,5 +1,7 @@
+2003-03-09 Tim Michals <t dot michals at attbi dot com>
+ * updated support for dual serial ports
2003-02-13 Tim Michals <t dot michals at attbi dot com>
2003-02-13 Jonathan Larmour <jifl at eCosCentric dot com>
* New package - support for MIPS IDT 79s334a board.
Index: current/cdl/ser_mipsidt_334a.cdl
===================================================================
RCS file:
/cvs/ecos/ecos/packages/devs/serial/mips/idt79s334a/current/cdl/ser_mipsidt_
334a.cdl,v
retrieving revision 1.1
diff -u -5 -p -r1.1 ser_mipsidt_334a.cdl
--- current/cdl/ser_mipsidt_334a.cdl 14 Feb 2003 01:44:03 -0000 1.1
+++ current/cdl/ser_mipsidt_334a.cdl 10 Mar 2003 04:48:21 -0000
@@ -61,11 +61,10 @@ cdl_package CYGPKG_IO_SERIAL_MIPS_IDT79S
include_dir cyg/io
# include_files ; # none _exported_ whatsoever
description "
This package contains the serial device drivers for the
MIPS IDT79RC32334 reference platform."
- doc redirect/ecos-device-drivers.html
compile -library=libextras.a mipsidt_serial.c
define_proc {
puts $::cdl_system_header "/***** serial driver proc output start
*****/"
@@ -83,27 +82,27 @@ cdl_option CYGPKG_IO_SERIAL_MIPS_POLLED_
drivers for the MIPS should be polled-mode instead of
interrupt driven."
}
cdl_component CYGPKG_IO_SERIAL_MIPS_IDT79S334A_SERIAL_A {
- display "MIPS IDT79S334A serial port driver"
+ display "MIPS IDT79S334A serial port driver 0"
flavor bool
default_value 1
description "
This option includes the serial device driver for the 16C550 on the
MIPS IDT79S334A."
cdl_option CYGDAT_IO_SERIAL_MIPS_IDT79S334A_SERIAL_A_NAME {
- display "Device name for MIPS IDT79S334A serial port"
+ display "Device name for MIPS IDT79S334A serial port 0"
flavor data
default_value {"\"/dev/ser0\""}
description "
This option specifies the device name on the MIPS IDT79S334A."
}
cdl_option CYGNUM_IO_SERIAL_MIPS_IDT79S334A_SERIAL_A_BAUD {
- display "Baud rate for the MIPS IDT79S334A serial port
driver"
+ display "Baud rate for the MIPS IDT79S334A serial port driver
0"
flavor data
legal_values { 50 75 110 "134_5" 150 200 300 600 1200 1800 2400
3600
4800 7200 9600 14400 19200 38400 57600 115200 230400
}
default_value 115200
@@ -111,19 +110,60 @@ cdl_component CYGPKG_IO_SERIAL_MIPS_IDT7
This option specifies the default baud rate (speed) for the
MIPS 16c550 port."
}
cdl_option CYGNUM_IO_SERIAL_MIPS_IDT79S334A_SERIAL_A_BUFSIZE {
- display "Buffer size for the MIPS IDT79S334A serial port
driver"
+ display "Buffer size for the MIPS IDT79S334A serial port
driver 0"
flavor data
legal_values 0 to 8192
default_value 512
description "
This option specifies the size of the internal buffers used
for the MIPS IDT79S334A 16c550c port."
}
}
+
+
+cdl_component CYGPKG_IO_SERIAL_MIPS_IDT79S334A_SERIAL_B {
+ display "MIPS IDT79S334A serial port driver 1"
+ flavor bool
+ default_value 1
+ description "
+ This option includes the serial device driver for the 16C550 on the
+ MIPS IDT79S334A."
+
+ cdl_option CYGDAT_IO_SERIAL_MIPS_IDT79S334A_SERIAL_B_NAME {
+ display "Device name for MIPS IDT79S334A serial port 1"
+ flavor data
+ default_value {"\"/dev/ser1\""}
+ description "
+ This option specifies the device name on the MIPS IDT79S334A."
+ }
+
+ cdl_option CYGNUM_IO_SERIAL_MIPS_IDT79S334A_SERIAL_B_BAUD {
+ display "Baud rate for the MIPS IDT79S334A serial port driver
1"
+ flavor data
+ legal_values { 50 75 110 "134_5" 150 200 300 600 1200 1800 2400
3600
+ 4800 7200 9600 14400 19200 38400 57600 115200 230400
+ }
+ default_value 115200
+ description "
+ This option specifies the default baud rate (speed) for the
+ MIPS 16c550 port."
+ }
+
+ cdl_option CYGNUM_IO_SERIAL_MIPS_IDT79S334A_SERIAL_B_BUFSIZE {
+ display "Buffer size for the MIPS IDT79S334A serial port
driver 1"
+ flavor data
+ legal_values 0 to 8192
+ default_value 512
+ description "
+ This option specifies the size of the internal buffers used
+ for the MIPS IDT79S334A 16c550c port."
+ }
+}
+
cdl_component CYGPKG_IO_SERIAL_MIPS_IDT79S334A_OPTIONS {
display "Serial device driver build options"
flavor none
description "
Index: current/src/mipsidt_serial.c
===================================================================
RCS file:
/cvs/ecos/ecos/packages/devs/serial/mips/idt79s334a/current/src/mipsidt_seri
al.c,v
retrieving revision 1.1
diff -u -5 -p -r1.1 mipsidt_serial.c
--- current/src/mipsidt_serial.c 14 Feb 2003 01:44:03 -0000 1.1
+++ current/src/mipsidt_serial.c 10 Mar 2003 04:48:22 -0000
@@ -96,12 +96,15 @@ static SERIAL_FUNS(mipsidt_serial_funs,
mipsidt_serial_set_config,
mipsidt_serial_start_xmit,
mipsidt_serial_stop_xmit
);
+
+#ifdef CYGPKG_IO_SERIAL_MIPS_IDT79S334A_SERIAL_A
static mipsidt_serial_info mipsidt_serial_info0 ={IDTMIPS_SER_16550_BASE_A,
- CYGNUM_HAL_INTERRUPT_SIO_0};
+ CYGNUM_HAL_INTERRUPT_SIO_0
+ };
#if CYGNUM_IO_SERIAL_MIPS_IDT79S334A_SERIAL_A_BUFSIZE > 0
static unsigned char
mipsidt_serial_out_buf0[CYGNUM_IO_SERIAL_MIPS_IDT79S334A_SERIAL_A_BUFSIZE];
static unsigned char
mipsidt_serial_in_buf0[CYGNUM_IO_SERIAL_MIPS_IDT79S334A_SERIAL_A_BUFSIZE];
@@ -137,10 +140,59 @@ DEVTAB_ENTRY(mipsidt_serial_io0,
mipsidt_serial_init,
mipsidt_serial_lookup, // Serial driver may need
initializing
&mipsidt_serial_channel0
);
+#endif
+
+
+
+
+#ifdef CYGPKG_IO_SERIAL_MIPS_IDT79S334A_SERIAL_B
+static mipsidt_serial_info mipsidt_serial_info1 ={IDTMIPS_SER_16550_BASE_B,
+ CYGNUM_HAL_INTERRUPT_SIO_1};
+
+#if CYGNUM_IO_SERIAL_MIPS_IDT79S334A_SERIAL_B_BUFSIZE > 0
+static unsigned char
mipsidt_serial_out_buf1[CYGNUM_IO_SERIAL_MIPS_IDT79S334A_SERIAL_B_BUFSIZE];
+static unsigned char
mipsidt_serial_in_buf1[CYGNUM_IO_SERIAL_MIPS_IDT79S334A_SERIAL_B_BUFSIZE];
+
+static SERIAL_CHANNEL_USING_INTERRUPTS(mipsidt_serial_channel1,
+ mipsidt_serial_funs,
+ mipsidt_serial_info1,
+
CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_MIPS_IDT79S334A_SERIAL_B_BAUD),
+ CYG_SERIAL_STOP_DEFAULT,
+ CYG_SERIAL_PARITY_DEFAULT,
+ CYG_SERIAL_WORD_LENGTH_DEFAULT,
+ CYG_SERIAL_FLAGS_DEFAULT,
+ &mipsidt_serial_out_buf1[0],
+ sizeof(mipsidt_serial_out_buf1),
+ &mipsidt_serial_in_buf1[0],
+ sizeof(mipsidt_serial_in_buf1)
+ );
+#else
+static SERIAL_CHANNEL(mipsidt_serial_channel1,
+ mipsidt_serial_funs,
+ mipsidt_serial_info1,
+
CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_MIPS_IDT79S334A_SERIAL_B_BAUD),
+ CYG_SERIAL_STOP_DEFAULT,
+ CYG_SERIAL_PARITY_DEFAULT,
+ CYG_SERIAL_WORD_LENGTH_DEFAULT,
+ CYG_SERIAL_FLAGS_DEFAULT
+ );
+#endif
+
+DEVTAB_ENTRY(mipsidt_serial_io1,
+ CYGDAT_IO_SERIAL_MIPS_IDT79S334A_SERIAL_B_NAME,
+ 0, // Does not depend on a lower level
interface
+ &cyg_io_serial_devio,
+ mipsidt_serial_init,
+ mipsidt_serial_lookup, // Serial driver may need
initializing
+ &mipsidt_serial_channel1
+ );
+
+#endif
+
// Internal function to actually configure the hardware to desired baud
rate, etc.
static bool
mipsidt_serial_config_port(serial_channel *chan, cyg_serial_info_t
*new_config, bool init)
@@ -241,11 +293,11 @@ mipsidt_serial_putc(serial_channel *chan
mipsidt_serial_info *mipsidt_chan = (mipsidt_serial_info
*)chan->dev_priv;
cyg_addrword_t port = mipsidt_chan->base;
cyg_uint8 _lsr;
HAL_READ_UINT8(port+SER_16550_LSR, _lsr);
- if (_lsr & SIO_LSR_THRE) {
+ if (((_lsr & (SIO_LSR_THRE | SIO_LSR_TEMT)) == 0x60)) {
// Transmit buffer is empty
HAL_WRITE_UINT8(port+SER_16550_THR, c);
return true;
} else {
// No space
@@ -342,12 +394,14 @@ mipsidt_serial_DSR(cyg_vector_t vector,
{
serial_channel *chan = (serial_channel *)data;
mipsidt_serial_info *mipsidt_chan = (mipsidt_serial_info
*)chan->dev_priv;
cyg_addrword_t port = mipsidt_chan->base;
cyg_uint8 _iir;
+ cyg_uint8 realISR;
HAL_READ_UINT8(port+SER_16550_IIR, _iir);
+
_iir &= SIO_IIR_ID_MASK;
if ( ISR_Tx_Empty == _iir ) {
(chan->callbacks->xmt_char)(chan);
} else if (( ISR_Rx_Avail == _iir ) || ( ISR_Rx_Char_Timeout == _iir ))
{
cyg_uint8 _c;
Index: current/src/mipsidt_serial.h
===================================================================
RCS file:
/cvs/ecos/ecos/packages/devs/serial/mips/idt79s334a/current/src/mipsidt_seri
al.h,v
retrieving revision 1.1
diff -u -5 -p -r1.1 mipsidt_serial.h
--- current/src/mipsidt_serial.h 14 Feb 2003 01:44:03 -0000 1.1
+++ current/src/mipsidt_serial.h 10 Mar 2003 04:48:22 -0000
@@ -100,10 +100,14 @@
#define IDTMIPS_SER_16550_BASE_A 0xB8000803
#define IDTMIPS_SER_16550_BASE_B 0xB8000823
#define SER_16550_BASE IDTMIPS_SER_16550_BASE_A
+#define INTR_COM0_REG 0xb8000554
+#define INTR_COM1_REG 0xb8000564
+
+
//--------------------------------------------------------------------------
---
// Define the serial registers. The IDT board is equipped with a 16550C
// serial chip.
#define SER_16550_RBR 0x00 // receiver buffer register, read, dlab = 0
#define SER_16550_THR 0x00 // transmitter holding register, write, dlab =
0
@@ -118,11 +122,11 @@
#define SER_16550_LSR 0x14 // line status register, read
#define SER_16550_MSR 0x18 // modem status register, read
#define SER_16550_SCR 0x1c // scratch pad register
// The interrupt enable register bits.
-#define SIO_IER_ERDAI 0x01 // enable received data available
irq
+#define SIO_IER_ERDAI 0x04 // enable received data available
irq
#define SIO_IER_ETHREI 0x02 // enable THR empty interrupt
#define SIO_IER_ELSI 0x04 // enable receiver line status irq
#define SIO_IER_EMSI 0x08 // enable modem status interrupt
// The interrupt identification register bits.
Index: current/ChangeLog
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/mips/idt32334/current/ChangeLog,v
retrieving revision 1.1
diff -u -5 -p -r1.1 ChangeLog
--- current/ChangeLog 14 Feb 2003 01:44:02 -0000 1.1
+++ current/ChangeLog 10 Mar 2003 04:52:42 -0000
@@ -1,5 +1,9 @@
+2003-03-09 Tim Michals <t dot michals at attbi dot com>
+ * Updated interrupt translation table (variant.inc)
+ * Interrupt Handling for serial ports (var_intr.c)
+
2003-02-13 Tim Michals <t dot michals at attbi dot com>
2003-02-13 Jonathan Larmour <jifl at eCosCentric dot com>
* New package - support for MIPS IDT 79s334a board.
Index: current/include/variant.inc
===================================================================
RCS file:
/cvs/ecos/ecos/packages/hal/mips/idt32334/current/include/variant.inc,v
retrieving revision 1.1
diff -u -5 -p -r1.1 variant.inc
--- current/include/variant.inc 14 Feb 2003 01:44:02 -0000 1.1
+++ current/include/variant.inc 10 Mar 2003 04:52:46 -0000
@@ -214,11 +214,11 @@ x\@:
.macro hal_intc_decode_data
hal_intc_translation_table:
.byte 0,1,0,0,3,3,0,0
.byte 0,0,0,0,0,0,0,0
- .byte 5,5,0,0,0,5,0,0
+ .byte 5,5,0,0,3,5,0,0
.byte 0,0,0,0,0,0,0,0
.byte 0,0,0,0,0,0,0,0
.byte 0,0,0,0,0,0,0,0
.byte 0,0,0,0,0,0,0,0
.byte 0,0,0,0,0,0,0,0
Index: current/src/var_intr.c
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/mips/idt32334/current/src/var_intr.c,v
retrieving revision 1.1
diff -u -5 -p -r1.1 var_intr.c
--- current/src/var_intr.c 14 Feb 2003 01:44:02 -0000 1.1
+++ current/src/var_intr.c 10 Mar 2003 04:52:46 -0000
@@ -164,14 +164,17 @@ void cyg_hal_interrupt_acknowledge (cyg_
switch (vector)
{
case CYGNUM_HAL_INTERRUPT_SIO_0:
HAL_WRITE_UINT32(INTR_CLEAR_COM0, 1);
+ HAL_WRITE_UINT32(INTR_CLEAR_REG, (reg | ((1 << SERIAL_PORT0_GROUP))));
+
break;
case CYGNUM_HAL_INTERRUPT_SIO_1:
HAL_WRITE_UINT32(INTR_CLEAR_COM1, 1);
+ HAL_WRITE_UINT32(INTR_CLEAR_REG, (reg | ((1 << SERIAL_PORT1_GROUP))));
break;
default:
HAL_INTERRUPT_ACKNOWLEDGE_CPU(vector);
}
@@ -185,11 +188,11 @@ hal_extended_isr(CYG_ADDRWORD vector, CY
cyg_uint32 isrNum;
HAL_READ_UINT32 (INTR_STATUS_PTR, pendingIsr);
- for (isrNum=0; isrNum <=31; isrNum)
+ for (isrNum=0; isrNum <=31; isrNum++)
if ( (1 << isrNum) & pendingIsr)
break;
if (pendingIsr) {
isrRet = hal_call_isr (CYGNUM_LAST_IDT_INTERRUPT + isrNum);
Index: current/ChangeLog
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/mips/idt79s334a/current/ChangeLog,v
retrieving revision 1.1
diff -u -5 -p -r1.1 ChangeLog
--- current/ChangeLog 14 Feb 2003 01:44:02 -0000 1.1
+++ current/ChangeLog 10 Mar 2003 04:57:48 -0000
@@ -1,5 +1,10 @@
+2003-03-09 Tim Michals <t dot michals at attbi dot com>
+ * updated support for serial ports (idt79rc233x.h)
+ * updated ROMRAM support for gdb (platform.inc)
+ * added comments for HW interrupts (plf_intr.h)
+ * updated ser16c550c.c for errata
2003-02-13 Tim Michals <t dot michals at attbi dot com>
2003-02-13 Jonathan Larmour <jifl at eCosCentric dot com>
* New package - support for MIPS IDT 79s334a board.
Index: current/include/idt79rc233x.h
===================================================================
RCS file:
/cvs/ecos/ecos/packages/hal/mips/idt79s334a/current/include/idt79rc233x.h,v
retrieving revision 1.1
diff -u -5 -p -r1.1 idt79rc233x.h
--- current/include/idt79rc233x.h 14 Feb 2003 01:44:02 -0000 1.1
+++ current/include/idt79rc233x.h 10 Mar 2003 04:57:50 -0000
@@ -423,10 +423,11 @@
#define SERIAL_PORT1_GROUP 6
/* Rc32134 Interrupt controller settings for Uart */
#define INTR_STATUS_PTR 0xb8000500
#define INTR_MASK_REG 0xb8000504
+#define INTR_CLEAR_REG 0xb8000508
#define INTR_COM0_REG 0xb8000554
#define INTR_COM1_REG 0xb8000564
#define INTR_CLEAR_COM0 0xb8000558
Index: current/include/platform.inc
===================================================================
RCS file:
/cvs/ecos/ecos/packages/hal/mips/idt79s334a/current/include/platform.inc,v
retrieving revision 1.1
diff -u -5 -p -r1.1 platform.inc
--- current/include/platform.inc 14 Feb 2003 01:44:02 -0000 1.1
+++ current/include/platform.inc 10 Mar 2003 04:57:50 -0000
@@ -43,11 +43,11 @@
#######DESCRIPTIONBEGIN####
##
## Author(s): tmichals
## Contributors: nickg
## Date: 2003-02-13
-## Purpose: CT1608-IDT32334 board definitions.
+## Purpose: IDT32334 board definitions.
## Description: This file contains various definitions and macros that are
## useful for writing assembly code for the IDT32334
reference
## board.
## Usage:
## #include <cyg/hal/platform.inc>
@@ -162,10 +162,39 @@
sw v0,0(t0) # write word
addi t0,t0,4
bne t0,t3,1b
nop
+/* set up and move interrupts */
+
+/* setup and move the vector table into ram */
+/* This allows execptions to happen in ROM first
+** then when running in RAM, they are switched */
+ mfc0 v0, status
+ nop
+ li v1, ~0x00400000
+ and v0, v0,v1
+ mtc0 v0, status
+ nop
+
+
+ la t0, hal_vsr_table
+ la t1,__default_interrupt_vsr
+
+ sw t1, 0(t0)
+
+ la t1,__default_exception_vsr
+ li t2, 62
+ li t3, 0
+ addi t0,t0,4
+12:
+ sw t1,0(t0)
+ addi t3,t3,1
+ addi t0,t0,4
+ bne t3,t2, 12b
+ nop
+
la v0,2f # RAM address to go to
jr v0
nop
2:
Index: current/include/plf_intr.h
===================================================================
RCS file:
/cvs/ecos/ecos/packages/hal/mips/idt79s334a/current/include/plf_intr.h,v
retrieving revision 1.1
diff -u -5 -p -r1.1 plf_intr.h
--- current/include/plf_intr.h 14 Feb 2003 01:44:02 -0000 1.1
+++ current/include/plf_intr.h 10 Mar 2003 04:57:50 -0000
@@ -73,11 +73,11 @@
// Interrupt vectors.
#ifndef CYGHWR_HAL_INTERRUPT_VECTORS_DEFINED
// the default for all MIPS variants is to use the 6 bits
// in the cause register.
-
+// These are only HW interrupts
#define CYGNUM_HAL_INTERRUPT_0 0
#define CYGNUM_HAL_INTERRUPT_1 1
#define CYGNUM_HAL_INTERRUPT_2 2
#define CYGNUM_HAL_INTERRUPT_3 3
#define CYGNUM_HAL_INTERRUPT_4 4
Index: current/src/ser16c550c.c
===================================================================
RCS file:
/cvs/ecos/ecos/packages/hal/mips/idt79s334a/current/src/ser16c550c.c,v
retrieving revision 1.1
diff -u -5 -p -r1.1 ser16c550c.c
--- current/src/ser16c550c.c 14 Feb 2003 01:44:03 -0000 1.1
+++ current/src/ser16c550c.c 10 Mar 2003 04:57:57 -0000
@@ -82,11 +82,11 @@
#define SER_16550_LSR 0x14 // line status register, read
#define SER_16550_MSR 0x18 // modem status register, read
#define SER_16550_SCR 0x1c // scratch pad register
// The interrupt enable register bits.
-#define SIO_IER_ERDAI 0x01 // enable received data available
irq
+#define SIO_IER_ERDAI 0x04 // enable received data available
irq
#define SIO_IER_ETHREI 0x02 // enable THR empty interrupt
#define SIO_IER_ELSI 0x04 // enable receiver line status irq
#define SIO_IER_EMSI 0x08 // enable modem status interrupt
// The interrupt identification register bits.