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Adding user mode support to Arm HAL
- From: Pierre Habraken <Pierre dot Habraken at imag dot fr>
- To: ecos-patches at sources dot redhat dot com
- Date: Mon, 07 Apr 2003 14:38:16 +0200
- Subject: Adding user mode support to Arm HAL
- Organization: Université Joseph Fourier
Dears maintainers,
I submit to you the patch attached below.
This patch aims to provide Redboot (actually HAL) for Arm with the
capability to debug Arm programs running in USER mode.
Three code files are concerned:
hal/arm/arch/current/src/vectors.S
hal/arm/arch/current/include/hal_arch.h
hal/arm/arch/current/src/hal_mk_defs.c
Also I added a configuration entry (possibly misnamed and/or misformed)
in hal/arm/arch/current/cdl/hal_arm.cdl.
Thanks in advance for your feedback concerning the proposed feature and
also the way I implemented it.
Pierre
===================================================================
--- hal/arm/arch/current/cdl/hal_arm.cdl.inst Tue Aug 6 16:34:04 2002
+++ hal/arm/arch/current/cdl/hal_arm.cdl Sat Apr 5 21:27:12 2003
@@ -212,6 +212,13 @@
active."
}
+ cdl_option CYGOPT_HAL_ARM_WITH_USER_MODE {
+ display "Accept exceptions and irq's occurring in user
mode"
+ default_value 0
+ description "
+ For standalone Redboot based programs running in user
mode."
+ }
+
cdl_component CYGPKG_REDBOOT_ARM_OPTIONS {
display "Redboot for ARM options"
flavor none
--- hal/arm/arch/current/include/hal_arch.h.inst Thu Aug 22
14:24:20 2002+++ hal/arm/arch/current/include/hal_arch.h Sat Apr 5
18:14:32 2003
@@ -64,6 +64,7 @@
#define CPSR_IRQ_DISABLE 0x80 // IRQ disabled when =1
#define CPSR_FIQ_DISABLE 0x40 // FIQ disabled when =1
#define CPSR_THUMB_ENABLE 0x20 // Thumb mode when =1
+#define CPSR_USER_MODE 0x10
#define CPSR_FIQ_MODE 0x11
#define CPSR_IRQ_MODE 0x12
#define CPSR_SUPERVISOR_MODE 0x13
--- hal/arm/arch/current/src/hal_mk_defs.c.inst Fri May 24 01:01:42 2002
+++ hal/arm/arch/current/src/hal_mk_defs.c Sat Apr 5 18:34:25 2003
@@ -109,6 +109,7 @@
DEFINE(CPSR_IRQ_DISABLE, CPSR_IRQ_DISABLE);
DEFINE(CPSR_FIQ_DISABLE, CPSR_FIQ_DISABLE);
DEFINE(CPSR_THUMB_ENABLE, CPSR_THUMB_ENABLE);
+ DEFINE(CPSR_USER_MODE, CPSR_USER_MODE);
DEFINE(CPSR_IRQ_MODE, CPSR_IRQ_MODE);
DEFINE(CPSR_FIQ_MODE, CPSR_FIQ_MODE);
DEFINE(CPSR_SUPERVISOR_MODE, CPSR_SUPERVISOR_MODE);
--- hal/arm/arch/current/src/vectors.S.inst Thu Aug 29 13:49:49 2002
+++ hal/arm/arch/current/src/vectors.S Sat Apr 5 21:30:56 2003
@@ -489,7 +489,8 @@
//
// Exception handlers
// Assumption: get here from a non-user context [mode]
-//
+// except in case of standalone app. running in user mode
+// (CYGOPT_HAL_ARM_WITH_USER_MODE should have been defined)
.code 32
undefined_instruction:
ldr sp,.__undef_exception_stack // get good stack
@@ -579,18 +580,30 @@
// r4 holds original svc lr, which must also be preserved
//
+
stmfd sp!,{r0-r2,r4,r5} // push svc_sp, svc_lr, vector,
psr, pc
+#ifdef CYGOPT_HAL_ARM_WITH_USER_MODE
+ // did exception occur in user mode ?
+ and r2, r1, #CPSR_MODE_BITS
+ cmp r2, #CPSR_USER_MODE
+ bne 1f
+ stmfd sp, {r8-r12, sp, lr}^ // get user mode regs
+ sub sp, sp, #4*7
+ bal 2f
+1:
+#endif
// switch to pre-exception mode to get banked regs
mov r0,sp // r0 survives mode switch
mrs r2,cpsr // Save current psr for return
+
orr r1,r1,#CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE
bic r1,r1,#CPSR_THUMB_ENABLE
msr cpsr,r1
stmfd r0!,{r8-r12,sp,lr}
msr cpsr,r2 // back to svc mode
mov sp,r0 // update stack pointer
-
+2:
// now save pre-exception r0-r7 on current stack
ldmfd r3,{r0-r5}
stmfd sp!,{r0-r7}
@@ -637,19 +650,30 @@
cmp r1,#CPSR_SUPERVISOR_MODE
ldmeqfd sp,{r0-r14,pc}^
+#ifdef CYGOPT_HAL_ARM_WITH_USER_MODE
+ // are we returning to user mode ?
+ and r2, r1, #CPSR_MODE_BITS
+ cmp r2, #CPSR_USER_MODE
+ add r2, sp, #armreg_r8
+ bne 1f
+ ldmfd r2, {r8-r14}^ // restore user mode regs
+ bal 2f
+1:
+#else
+ add r2, sp, #armreg_r8
+#endif
//
// return to other non-user modes is a little trickier
//
// switch to pre-exception mode and restore r8-r14
- add r2,sp,#armreg_r8
mrs r1,cpsr
orr r0,r0,#CPSR_IRQ_DISABLE|CPSR_FIQ_DISABLE
bic r0,r0,#CPSR_THUMB_ENABLE
msr cpsr,r0
ldmfd r2,{r8-r14}
msr cpsr, r1 // back to svc mode
-
+2:
// move sp,lr and pc for final load
ldr r0,[sp,#armreg_svcsp]
str r0,[sp,#armreg_r8]
@@ -675,6 +699,8 @@
// Handle device interrupts
// This is slightly more complicated than the other exception handlers
because
// it needs to interface with the kernel (if present).
+// Assumption: can get here from any mode, including user mode
+// (spurious interrupt while standalone app. is running in user mode)
.code 32
FIQ:
@@ -722,6 +748,16 @@
mov r4,lr // save original svc lr
stmfd sp!,{r0-r2,r4,r5} // push svc_sp, svc_lr, vector,
psr, pc
+#ifdef CYGOPT_HAL_ARM_WITH_USER_MODE
+ // did exception occur in user mode ?
+ and r2, r1, #CPSR_MODE_BITS
+ cmp r2, #CPSR_USER_MODE
+ bne 1f
+ stmfd sp, {r8-r12, sp, lr}^ // get user mode regs
+ sub sp, sp, #4*7
+ bal 2f
+1:
+#endif
// switch to pre-exception mode to get banked regs
mov r0,sp // r0 survives mode switch
mrs r2,cpsr // Save current psr for return
@@ -731,7 +767,7 @@
stmfd r0!,{r8-r12,sp,lr}
msr cpsr,r2 // back to svc mode
mov sp,r0 // update stack pointer
-
+2:
// now save pre-exception r0-r7 on current stack
ldmfd r3,{r0-r5}
stmfd sp!,{r0-r7}
===================================================================
--
________________________________________________________________________
Pierre HABRAKEN - mailto:Pierre dot Habraken at imag dot fr
Tél: 04 76 82 72 83 - Fax: 04 76 82 72 87
IMAG-LSR BP72 38402 SAINT MARTIN D'HERES Cedex
________________________________________________________________________