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Re: Fix for setting/clearing breaks take 2
John Newlin wrote:
Jonathan Larmour wrote:
John Newlin wrote:
My previous patch had a small bug in it. It really works this time. ;)
Can you give a bit more background on this? This patch doesn't seem
right to me.... surely you should be defining things so that
"*(t_inst*)pc = (t_inst)HAL_BREAKINST;" will work?
Unfortunately that does not work on the Xtensa architecture. Xtensa has
instructions that are 2 bytes or 3 bytes. The break instruction is
2-bytes, however it can be on any alignment (due to the intermixed
3-byte instructions throwing off the alignment). Yes, the architecture
is weird that way, instructions can be on any alignment, but the
load/store instructions require aligned data. It does make for some
compact code though. :)
Yes that's certainly exotic. Thanks for the explanation (and the rest I
snipped). I've checked in your patch. Thanks!
Jifl
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