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new Target - phytec phycore AT91M55800A and AT91serial driver patch (3UARTS)


Hi,

I've done initial work and testing on eval board from Phytec

I added a patch for the serial driver of AT91 in cause of 3 UARTS on the 
phycore - board.
Also made images for the target.
Hope it is ok.

Sebastian

PS: I also generated images for the target, but can't upload it by mail in 
cause of to big email :(
--- devs/serial/arm/at91/current/src/at91_serial.c	2004-01-26 09:38:24.000000000 +0100
+++ devs/serial/arm/at91/current/src/at91_serial.c	2004-09-20 16:40:55.000000000 +0200
@@ -96,7 +96,8 @@
 static bool at91_serial_init(struct cyg_devtab_entry *tab);
 static bool at91_serial_putc_interrupt(serial_channel *chan, unsigned char c);
 #if (defined(CYGPKG_IO_SERIAL_ARM_AT91_SERIAL0) && CYGNUM_IO_SERIAL_ARM_AT91_SERIAL0_BUFSIZE == 0) \
- || (defined(CYGPKG_IO_SERIAL_ARM_AT91_SERIAL1) && CYGNUM_IO_SERIAL_ARM_AT91_SERIAL1_BUFSIZE == 0)
+ || (defined(CYGPKG_IO_SERIAL_ARM_AT91_SERIAL1) && CYGNUM_IO_SERIAL_ARM_AT91_SERIAL1_BUFSIZE == 0) \
+ || (defined(CYGPKG_IO_SERIAL_ARM_AT91_SERIAL2) && CYGNUM_IO_SERIAL_ARM_AT91_SERIAL2_BUFSIZE == 0)
 static bool at91_serial_putc_polled(serial_channel *chan, unsigned char c);
 #endif
 static Cyg_ErrNo at91_serial_lookup(struct cyg_devtab_entry **tab, 
@@ -104,7 +105,8 @@
                                     const char *name);
 static unsigned char at91_serial_getc_interrupt(serial_channel *chan);
 #if (defined(CYGPKG_IO_SERIAL_ARM_AT91_SERIAL0) && CYGNUM_IO_SERIAL_ARM_AT91_SERIAL0_BUFSIZE == 0) \
- || (defined(CYGPKG_IO_SERIAL_ARM_AT91_SERIAL1) && CYGNUM_IO_SERIAL_ARM_AT91_SERIAL1_BUFSIZE == 0)
+ || (defined(CYGPKG_IO_SERIAL_ARM_AT91_SERIAL1) && CYGNUM_IO_SERIAL_ARM_AT91_SERIAL1_BUFSIZE == 0) \
+ || (defined(CYGPKG_IO_SERIAL_ARM_AT91_SERIAL2) && CYGNUM_IO_SERIAL_ARM_AT91_SERIAL2_BUFSIZE == 0)
 static unsigned char at91_serial_getc_polled(serial_channel *chan);
 #endif
 static Cyg_ErrNo at91_serial_set_config(serial_channel *chan, cyg_uint32 key,
@@ -116,7 +118,8 @@
 static void       at91_serial_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data);
 
 #if (defined(CYGPKG_IO_SERIAL_ARM_AT91_SERIAL0) && CYGNUM_IO_SERIAL_ARM_AT91_SERIAL0_BUFSIZE > 0) \
- || (defined(CYGPKG_IO_SERIAL_ARM_AT91_SERIAL1) && CYGNUM_IO_SERIAL_ARM_AT91_SERIAL1_BUFSIZE > 0)
+ || (defined(CYGPKG_IO_SERIAL_ARM_AT91_SERIAL1) && CYGNUM_IO_SERIAL_ARM_AT91_SERIAL1_BUFSIZE > 0) \
+ || (defined(CYGPKG_IO_SERIAL_ARM_AT91_SERIAL2) && CYGNUM_IO_SERIAL_ARM_AT91_SERIAL2_BUFSIZE > 0)
 static SERIAL_FUNS(at91_serial_funs_interrupt, 
                    at91_serial_putc_interrupt, 
                    at91_serial_getc_interrupt,
@@ -127,7 +130,8 @@
 #endif
 
 #if (defined(CYGPKG_IO_SERIAL_ARM_AT91_SERIAL0) && CYGNUM_IO_SERIAL_ARM_AT91_SERIAL0_BUFSIZE == 0) \
- || (defined(CYGPKG_IO_SERIAL_ARM_AT91_SERIAL1) && CYGNUM_IO_SERIAL_ARM_AT91_SERIAL1_BUFSIZE == 0)
+ || (defined(CYGPKG_IO_SERIAL_ARM_AT91_SERIAL1) && CYGNUM_IO_SERIAL_ARM_AT91_SERIAL1_BUFSIZE == 0) \
+ || (defined(CYGPKG_IO_SERIAL_ARM_AT91_SERIAL2) && CYGNUM_IO_SERIAL_ARM_AT91_SERIAL2_BUFSIZE == 0)
 static SERIAL_FUNS(at91_serial_funs_polled, 
                    at91_serial_putc_polled, 
                    at91_serial_getc_polled,
@@ -193,7 +197,6 @@
     rcv_chunk_size  : CYGNUM_IO_SERIAL_ARM_AT91_SERIAL1_RCV_CHUNK_SIZE,
     rcv_buffer      : {at91_serial_rcv_buffer_1[0], at91_serial_rcv_buffer_1[1]}
 };
-
 #if CYGNUM_IO_SERIAL_ARM_AT91_SERIAL1_BUFSIZE > 0
 static unsigned char at91_serial_out_buf1[CYGNUM_IO_SERIAL_ARM_AT91_SERIAL1_BUFSIZE];
 static unsigned char at91_serial_in_buf1[CYGNUM_IO_SERIAL_ARM_AT91_SERIAL1_BUFSIZE];
@@ -231,6 +234,56 @@
     );
 #endif //  CYGPKG_IO_SERIAL_ARM_AT91_SERIAL1
 
+
+#ifdef CYGPKG_IO_SERIAL_ARM_AT91_SERIAL2
+
+static cyg_uint8 at91_serial_rcv_buffer_2
+    [2][CYGNUM_IO_SERIAL_ARM_AT91_SERIAL2_RCV_CHUNK_SIZE + RCVBUF_EXTRA];
+static at91_serial_info at91_serial_info2 = {
+    base            : (CYG_ADDRWORD) AT91_USART2,
+    int_num         : CYGNUM_HAL_INTERRUPT_USART2,
+    rcv_chunk_size  : CYGNUM_IO_SERIAL_ARM_AT91_SERIAL2_RCV_CHUNK_SIZE,
+    rcv_buffer      : {at91_serial_rcv_buffer_2[0], at91_serial_rcv_buffer_2[1]}
+};
+
+#if CYGNUM_IO_SERIAL_ARM_AT91_SERIAL2_BUFSIZE > 0
+static unsigned char at91_serial_out_buf2[CYGNUM_IO_SERIAL_ARM_AT91_SERIAL2_BUFSIZE];
+static unsigned char at91_serial_in_buf2[CYGNUM_IO_SERIAL_ARM_AT91_SERIAL2_BUFSIZE];
+
+static SERIAL_CHANNEL_USING_INTERRUPTS(at91_serial_channel2,
+                                       at91_serial_funs_interrupt, 
+                                       at91_serial_info2,
+                                       CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_ARM_AT91_SERIAL2_BAUD),
+                                       CYG_SERIAL_STOP_DEFAULT,
+                                       CYG_SERIAL_PARITY_DEFAULT,
+                                       CYG_SERIAL_WORD_LENGTH_DEFAULT,
+                                       CYG_SERIAL_FLAGS_DEFAULT,
+                                       &at91_serial_out_buf2[0], sizeof(at91_serial_out_buf2),
+                                       &at91_serial_in_buf2[0], sizeof(at91_serial_in_buf2)
+    );
+#else
+static SERIAL_CHANNEL(at91_serial_channel2,
+                      at91_serial_funs_polled, 
+                      at91_serial_info2,
+                      CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_ARM_AT91_SERIAL2_BAUD),
+                      CYG_SERIAL_STOP_DEFAULT,
+                      CYG_SERIAL_PARITY_DEFAULT,
+                      CYG_SERIAL_WORD_LENGTH_DEFAULT,
+                      CYG_SERIAL_FLAGS_DEFAULT
+    );
+#endif
+
+DEVTAB_ENTRY(at91_serial_io2, 
+             CYGDAT_IO_SERIAL_ARM_AT91_SERIAL2_NAME,
+             0,                     // Does not depend on a lower level interface
+             &cyg_io_serial_devio, 
+             at91_serial_init, 
+             at91_serial_lookup,     // Serial driver may need initializing
+             &at91_serial_channel2
+    );
+#endif //  CYGPKG_IO_SERIAL_ARM_AT91_SERIAL2
+
+
 // Internal function to actually configure the hardware to desired baud rate, etc.
 static bool
 at91_serial_config_port(serial_channel *chan, cyg_serial_info_t *new_config, bool init)
@@ -338,7 +391,8 @@
 }
 
 #if (defined(CYGPKG_IO_SERIAL_ARM_AT91_SERIAL0) && CYGNUM_IO_SERIAL_ARM_AT91_SERIAL0_BUFSIZE == 0) \
- || (defined(CYGPKG_IO_SERIAL_ARM_AT91_SERIAL1) && CYGNUM_IO_SERIAL_ARM_AT91_SERIAL1_BUFSIZE == 0)
+ || (defined(CYGPKG_IO_SERIAL_ARM_AT91_SERIAL1) && CYGNUM_IO_SERIAL_ARM_AT91_SERIAL1_BUFSIZE == 0) \
+ || (defined(CYGPKG_IO_SERIAL_ARM_AT91_SERIAL2) && CYGNUM_IO_SERIAL_ARM_AT91_SERIAL2_BUFSIZE == 0)
 static bool
 at91_serial_putc_polled(serial_channel *chan, unsigned char c)
 {
@@ -367,7 +421,8 @@
 }
 
 #if (defined(CYGPKG_IO_SERIAL_ARM_AT91_SERIAL0) && CYGNUM_IO_SERIAL_ARM_AT91_SERIAL0_BUFSIZE == 0) \
- || (defined(CYGPKG_IO_SERIAL_ARM_AT91_SERIAL1) && CYGNUM_IO_SERIAL_ARM_AT91_SERIAL1_BUFSIZE == 0)
+ || (defined(CYGPKG_IO_SERIAL_ARM_AT91_SERIAL1) && CYGNUM_IO_SERIAL_ARM_AT91_SERIAL1_BUFSIZE == 0) \
+ || (defined(CYGPKG_IO_SERIAL_ARM_AT91_SERIAL2) && CYGNUM_IO_SERIAL_ARM_AT91_SERIAL2_BUFSIZE == 0)
 static unsigned char 
 at91_serial_getc_polled(serial_channel *chan)
 {

 
--- hal/arm/at91/var/current/src/hal_diag.c	2004-02-20 19:36:43.000000000 +0100
+++ hal/arm/at91/var/current/src/hal_diag.c	2004-10-12 11:38:56.000000000 +0200
@@ -269,9 +269,10 @@
     return res;
 }
 
-static channel_data_t at91_ser_channels[2] = {
+static channel_data_t at91_ser_channels[3] = {
     { (cyg_uint8*)AT91_USART0, 1000, CYGNUM_HAL_INTERRUPT_USART0, CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD},
-    { (cyg_uint8*)AT91_USART1, 1000, CYGNUM_HAL_INTERRUPT_USART1, CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD}
+    { (cyg_uint8*)AT91_USART1, 1000, CYGNUM_HAL_INTERRUPT_USART1, CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD},
+    { (cyg_uint8*)AT91_USART2, 1000, CYGNUM_HAL_INTERRUPT_USART2, CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD}
 };
 
 static void
@@ -287,7 +288,9 @@
 #if CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS > 1
     cyg_hal_plf_serial_init_channel(&at91_ser_channels[1]);
 #endif
-
+#if CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS > 2
+    cyg_hal_plf_serial_init_channel(&at91_ser_channels[2]);
+#endif
     // Setup procs in the vector table
 
     // Set channel 0
@@ -315,6 +318,18 @@
     CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_plf_serial_isr);
     CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_hal_plf_serial_getc_timeout);
 #endif
+#if CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS > 2    
+    CYGACC_CALL_IF_SET_CONSOLE_COMM(2);
+    comm = CYGACC_CALL_IF_CONSOLE_PROCS();
+    CYGACC_COMM_IF_CH_DATA_SET(*comm, &at91_ser_channels[2]);
+    CYGACC_COMM_IF_WRITE_SET(*comm, cyg_hal_plf_serial_write);
+    CYGACC_COMM_IF_READ_SET(*comm, cyg_hal_plf_serial_read);
+    CYGACC_COMM_IF_PUTC_SET(*comm, cyg_hal_plf_serial_putc);
+    CYGACC_COMM_IF_GETC_SET(*comm, cyg_hal_plf_serial_getc);
+    CYGACC_COMM_IF_CONTROL_SET(*comm, cyg_hal_plf_serial_control);
+    CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_plf_serial_isr);
+    CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_hal_plf_serial_getc_timeout);
+#endif
 
     // Restore original console
     CYGACC_CALL_IF_SET_CONSOLE_COMM(cur);
 

Attachment: phycore.db
Description: Text document

Attachment: phycore.tar.gz
Description: application/tgz


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