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Good afternoon, I would like to submit three new ethernet PHY devices drivers to be added in ($REPOSITORY/devs/eth/phy/current/src) DM9161.c for Davicom DM9161 PHY LXT971A.c for Intel LXT971A PHY STE100P.c for ST MicroElectronics STE100P PHY They are all based on DP83847.c by Gary Thomas and as so, should be released under the eCOS licence. The following lines were also added intto the phy_eth_drivers.cdl file in order to provide optional compilation. cdl_option CYGHWR_DEVS_ETH_PHY_DM9161 { display "DM9161" flavor bool default_value 0 compile -library=libextras.a DM9161.c description " Include support for Davicom DM9161 NetPHY" } cdl_option CYGHWR_DEVS_ETH_PHY_STE100P { display "STE100P" flavor bool default_value 0 compile -library=libextras.a STE100P.c description " Include support for ST MicroElectronics STE100P" } cdl_option CYGHWR_DEVS_ETH_PHY_LXT971A { display "Intel LXT971A" flavor bool default_value 0 compile -library=libextras.a LXT971A.c description " Include support for Intel LXT971A rev. A4 NetPHY" } Thanks for all. Have a nice day.
//========================================================================== // // LXT971A.c // // Ethernet transceiver (PHY) support // //========================================================================== //####ECOSGPLCOPYRIGHTBEGIN#### // ------------------------------------------- // This file is part of eCos, the Embedded Configurable Operating System. // Copyright (C) 2003 Gary Thomas // // eCos is free software; you can redistribute it and/or modify it under // the terms of the GNU General Public License as published by the Free // Software Foundation; either version 2 or (at your option) any later version. // // eCos is distributed in the hope that it will be useful, but WITHOUT ANY // WARRANTY; without even the implied warranty of MERCHANTABILITY or // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License // for more details. // // You should have received a copy of the GNU General Public License along // with eCos; if not, write to the Free Software Foundation, Inc., // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. // // As a special exception, if other files instantiate templates or use macros // or inline functions from this file, or you compile this file and link it // with other works to produce a work based on this file, this file does not // by itself cause the resulting work to be covered by the GNU General Public // License. However the source code for this file must still be made available // in accordance with section (3) of the GNU General Public License. // // This exception does not invalidate any other reasons why a work based on // this file might be covered by the GNU General Public License. // // Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. // at http://sources.redhat.com/ecos/ecos-license/ // ------------------------------------------- //####ECOSGPLCOPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // // Author(s): gthomas, dthomas // Contributors: // Date: 2005-05-10 // Purpose: // Description: Support for ETHERNET Intel LXT971A PHY // Note: The use of the _eth_phy_dev() macro has a PHY_ID parameter // which is that of LXT971A revision A4 (== stepping 2). // See Identification Information in document // LXT971A Specification Update. // // //####DESCRIPTIONEND#### // //========================================================================== #include <pkgconf/system.h> #include <cyg/infra/cyg_type.h> #include <cyg/infra/diag.h> #include <cyg/hal/hal_arch.h> #include <cyg/hal/drv_api.h> #include <cyg/hal/hal_if.h> #include <cyg/hal/hal_tables.h> #include <cyg/io/eth_phy.h> #include <cyg/io/eth_phy_dev.h> #define MAIN_STATE_REGISTER_NUMBER 1 #define CONFIGURATION_REGISTER_NUMBER 16 #define MAIN_STATE_AUTONEGOTIATION_COMPLETE_MASK 0x0020 #define MAIN_STATE_LINK_IS_UP_MASK 0x0004 #define SUPPL_STATE_REGISTER_NUMBER 17 #define SUPPL_STATE_100BASETX_OPERATION_MASK 0x4000 #define SUPPL_STATE_FULLDUPLEX_OPERATION_MASK 0x0200 static bool LXT971A_stat(eth_phy_access_t *f, int *state) { unsigned short phy_main_state; unsigned short phy_suppl_state; int tries; // Read negotiated state if (_eth_phy_read(f, MAIN_STATE_REGISTER_NUMBER, f->phy_addr, &phy_main_state) && _eth_phy_read(f, SUPPL_STATE_REGISTER_NUMBER, f->phy_addr, &phy_suppl_state)) { if ((phy_main_state & MAIN_STATE_AUTONEGOTIATION_COMPLETE_MASK) == 0) { // auto-negotiation is not complete diag_printf("... waiting for auto-negotiation"); for (tries = 0; tries < 30; tries++) { if (_eth_phy_read(f, MAIN_STATE_REGISTER_NUMBER, f->phy_addr, &phy_main_state)) { if ((phy_main_state & MAIN_STATE_AUTONEGOTIATION_COMPLETE_MASK) != 0) { // auto-negotiation is complete, stop polling on the state diag_printf(" OK"); #if 0 { // DEBUG ONLY static int done = 0; if (!done) { _eth_phy_write(f, 0, f->phy_addr, 0x4100); done = 1; } } #endif break; } } CYGACC_CALL_IF_DELAY_US(100000); // microseconds diag_printf("."); } diag_printf("\n"); } if ((phy_main_state & MAIN_STATE_AUTONEGOTIATION_COMPLETE_MASK) != 0) { *state = 0; if (phy_main_state & MAIN_STATE_LINK_IS_UP_MASK) { *state |= ETH_PHY_STAT_LINK; } if (phy_suppl_state & SUPPL_STATE_100BASETX_OPERATION_MASK) { *state |= ETH_PHY_STAT_100MB; } if (phy_suppl_state & SUPPL_STATE_FULLDUPLEX_OPERATION_MASK) { *state |= ETH_PHY_STAT_FDX; } #if 1 // DT affichage pour test du 18.05.2005 uniquement unsigned short configuration_state; if (_eth_phy_read(f, CONFIGURATION_REGISTER_NUMBER, f->phy_addr, &configuration_state)) { diag_printf("%s : LXT971A config=0x%x\n", __func__, configuration_state); } #endif return true; } } return false; } _eth_phy_dev("Intel LXT971A", 0x001378E2, LXT971A_stat)
//========================================================================== // // dev/STE100P.c // // Ethernet transciever (PHY) support // //========================================================================== //####ECOSGPLCOPYRIGHTBEGIN#### // ------------------------------------------- // This file is part of eCos, the Embedded Configurable Operating System. // Copyright (C) 2003 Gary Thomas // // eCos is free software; you can redistribute it and/or modify it under // the terms of the GNU General Public License as published by the Free // Software Foundation; either version 2 or (at your option) any later version. // // eCos is distributed in the hope that it will be useful, but WITHOUT ANY // WARRANTY; without even the implied warranty of MERCHANTABILITY or // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License // for more details. // // You should have received a copy of the GNU General Public License along // with eCos; if not, write to the Free Software Foundation, Inc., // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. // // As a special exception, if other files instantiate templates or use macros // or inline functions from this file, or you compile this file and link it // with other works to produce a work based on this file, this file does not // by itself cause the resulting work to be covered by the GNU General Public // License. However the source code for this file must still be made available // in accordance with section (3) of the GNU General Public License. // // This exception does not invalidate any other reasons why a work based on // this file might be covered by the GNU General Public License. // // Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. // at http://sources.redhat.com/ecos/ecos-license/ // ------------------------------------------- //####ECOSGPLCOPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // // Author(s): gthomas // Contributors: // Date: 2003-08-01 // Purpose: // Description: Support for ethernet STE100P // // //####DESCRIPTIONEND#### // //========================================================================== #include <pkgconf/system.h> #include <pkgconf/devs_eth_powerpc_fcc.h> #include <cyg/infra/cyg_type.h> #include <cyg/infra/diag.h> #include <cyg/hal/hal_arch.h> #include <cyg/hal/drv_api.h> #include <cyg/hal/hal_if.h> #include <cyg/hal/hal_tables.h> #include <cyg/io/eth_phy.h> #include <cyg/io/eth_phy_dev.h> static bool ste100p_stat(eth_phy_access_t *f, int *state) { unsigned short phy_state=0,reset_mode; int tries=0; reset_mode = PHY_BMCR_AUTO_NEG; _eth_phy_write(f, PHY_BMCR, f->phy_addr, reset_mode); // desactivation des phy pour utiliser TIN3 et TIN4 // _eth_phy_write(f, 0x0, f->phy_addr, 0x1800); // Read negotiated state if (_eth_phy_read(f, 0x1, f->phy_addr, &phy_state)) { if ((phy_state & PHY_BMSR_AUTO_NEG) == 0) { //GV-- diag_printf("... waiting for auto-negotiation (1sec):"); /*GV++*/ diag_printf("... waiting for auto-negotiation (30 x 0,1sec):"); //GV-- for (tries = 0; tries < 15; tries++) { /*GV++*/ for (tries = 0; tries < 30; tries++) { if (_eth_phy_read(f, 0x1, f->phy_addr, &phy_state)) { if ((phy_state & PHY_BMSR_AUTO_NEG) != 0) { diag_printf(" Autoneg done\n"); break; } else { } } // fin du if eth_phy_read //GV-- CYGACC_CALL_IF_DELAY_US(1000000); // 1 second /*GV++*/ CYGACC_CALL_IF_DELAY_US(100000); // 0.1 second diag_printf("."); } // fin du for } if ((phy_state & PHY_BMSR_AUTO_NEG) != 0) { diag_printf(" Autoneg was done\n"); *state = 0; /*GV++*/ if (_eth_phy_read(f, 0x1, f->phy_addr, &phy_state)) { if ((phy_state & PHY_BMSR_LINK) != 0) *state |= ETH_PHY_STAT_LINK; /*GV++*/ } if (_eth_phy_read(f, 0x5, f->phy_addr, &phy_state)) { // Partner negotiated parameters if ((phy_state & 0x0100) != 0) *state |= ETH_PHY_STAT_100MB | ETH_PHY_STAT_FDX; if ((phy_state & 0x0080) != 0) *state |= ETH_PHY_STAT_100MB; #ifdef ETH_PHY_STAT_10MB if ((phy_state & 0x0040) != 0) *state |= ETH_PHY_STAT_10MB | ETH_PHY_STAT_FDX; if ((phy_state & 0x0020) != 0) *state |= ETH_PHY_STAT_10MB; #endif _eth_phy_read(f, 17, f->phy_addr, &phy_state); CYGACC_CALL_IF_DELAY_US(1000000); // 0.1 second return true; } } } return false; } _eth_phy_dev("ste100p", 0x1c040011, ste100p_stat)
//========================================================================== // // dev/DM9161.c // // Ethernet transciever (PHY) support // //========================================================================== //####ECOSGPLCOPYRIGHTBEGIN#### // ------------------------------------------- // This file is part of eCos, the Embedded Configurable Operating System. // Copyright (C) 2003 Gary Thomas // // eCos is free software; you can redistribute it and/or modify it under // the terms of the GNU General Public License as published by the Free // Software Foundation; either version 2 or (at your option) any later version. // // eCos is distributed in the hope that it will be useful, but WITHOUT ANY // WARRANTY; without even the implied warranty of MERCHANTABILITY or // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License // for more details. // // You should have received a copy of the GNU General Public License along // with eCos; if not, write to the Free Software Foundation, Inc., // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. // // As a special exception, if other files instantiate templates or use macros // or inline functions from this file, or you compile this file and link it // with other works to produce a work based on this file, this file does not // by itself cause the resulting work to be covered by the GNU General Public // License. However the source code for this file must still be made available // in accordance with section (3) of the GNU General Public License. // // This exception does not invalidate any other reasons why a work based on // this file might be covered by the GNU General Public License. // // Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. // at http://sources.redhat.com/ecos/ecos-license/ // ------------------------------------------- //####ECOSGPLCOPYRIGHTEND#### //========================================================================== //#####DESCRIPTIONBEGIN#### // // Author(s): gthomas // Contributors: // Date: 2003-08-01 // Purpose: // Description: Support for ethernet NS DM9161 // // //####DESCRIPTIONEND#### // //========================================================================== #include <pkgconf/system.h> #include <pkgconf/devs_eth_powerpc_fcc.h> #include <cyg/infra/cyg_type.h> #include <cyg/infra/diag.h> #include <cyg/hal/hal_arch.h> #include <cyg/hal/drv_api.h> #include <cyg/hal/hal_if.h> #include <cyg/hal/hal_tables.h> #include <cyg/io/eth_phy.h> #include <cyg/io/eth_phy_dev.h> #ifdef SHOW_DAVICOM_STATUS #include <string.h> eth_phy_access_t davicom_eth0; eth_phy_access_t davicom_eth1; #endif static bool dm9161_stat(eth_phy_access_t *f, int *state) { int phy_timeout = 500; bool phy_ok; unsigned short phy_state; #ifdef CYGSEM_DEVS_ETH_POWERPC_FCC_RESET_PHY unsigned short reset_mode; #endif phy_ok = false; // set register 16 to default value _eth_phy_write(f, 16, f->phy_addr, 0x610); #ifdef SHOW_DAVICOM_STATUS if (f->phy_addr == 0) memcpy(&davicom_eth0,f,sizeof(eth_phy_access_t)); else memcpy(&davicom_eth1,f,sizeof(eth_phy_access_t)); #endif // reset devicom only if specified (normally done for redboot) #ifdef CYGSEM_DEVS_ETH_POWERPC_FCC_RESET_PHY reset_mode = PHY_BMCR_RESTART | PHY_BMCR_AUTO_NEG; _eth_phy_write(f, PHY_BMCR, f->phy_addr, reset_mode); #endif // loop to wait autonegotiation status while (phy_timeout-- >= 0) { #ifdef CYGHWR_HAL_POWERPC_WATCHDOG // reset watchdog IMM->siu_swsr = 0x556C; IMM->siu_swsr = 0xaa39; #endif phy_ok = _eth_phy_read(f, PHY_BMSR, f->phy_addr, &phy_state); if (phy_ok && (phy_state & PHY_BMSR_AUTO_NEG)) { // autonegotiation is OK break; } else { // autonegotiation not finish CYGACC_CALL_IF_DELAY_US(10000); // 10 ms } } if (phy_timeout <= 0) { // stop autonegiation processus, no link found return false; } *state = 0; _eth_phy_read(f, PHY_BMSR, f->phy_addr, &phy_state); if ((phy_state & PHY_BMSR_LINK) != 0) *state |= ETH_PHY_STAT_LINK; if (_eth_phy_read(f, PHY_ANLPAR, f->phy_addr, &phy_state)) { // Partner negotiated parameters if ((phy_state & PHY_ANLPAR_100FD) != 0) *state |= ETH_PHY_STAT_100MB | ETH_PHY_STAT_FDX; if ((phy_state & PHY_ANLPAR_100HD) != 0) *state |= ETH_PHY_STAT_100MB; if ((phy_state & PHY_ANLPAR_10FD) != 0) *state |= ETH_PHY_STAT_FDX; return true; } return false; } _eth_phy_dev("Davicom", 0x181b881, dm9161_stat)
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