This is the mail archive of the
ecos-patches@sources.redhat.com
mailing list for the eCos project.
SH context stack corruption fix with ISR
- From: Jonathan Larmour <jifl at eCosCentric dot com>
- To: eCos Patches List <ecos-patches at ecos dot sourceware dot org>
- Date: Thu, 30 Jun 2005 12:15:04 +0100
- Subject: SH context stack corruption fix with ISR
This patch fixes bug 1000170, so see the discussion at
http://bugs.ecos.sourceware.org/show_bug.cgi?id=1000170 for the rationale.
It's a big long to reproduce here.
Jifl
--
eCosCentric http://www.eCosCentric.com/ The eCos and RedBoot experts
--["No sense being pessimistic, it wouldn't work anyway"]-- Opinions==mine
Index: ChangeLog
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/sh/arch/current/ChangeLog,v
retrieving revision 1.52
diff -u -5 -p -r1.52 ChangeLog
--- ChangeLog 27 May 2004 13:22:10 -0000 1.52
+++ ChangeLog 30 Jun 2005 10:47:27 -0000
@@ -1,5 +1,12 @@
+2005-04-18 Michael Beach <michaelb@ieee.org>
+2005-04-18 Jonathan Larmour <jifl@eCosCentric.com>
+
+ * src/context.S: Read out SR from saved context before switching
+ stacks, to avoid being trashed by interrupts.
+ [Bug #1000170]
+
2004-05-27 Gary Thomas <gary@mlbassoc.com>
* src/redboot_linux_exec.c (do_exec): Be sensitive to value in
"entry_address" as this can indicate if the image to be executed
is valid (the "load" functions set it to "NO_MEMORY" when invalid)
Index: include/arch.inc
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/sh/arch/current/include/arch.inc,v
retrieving revision 1.5
diff -u -5 -p -r1.5 arch.inc
--- include/arch.inc 23 May 2002 23:04:35 -0000 1.5
+++ include/arch.inc 30 Jun 2005 10:47:27 -0000
@@ -124,15 +124,18 @@ $##name##n: .long CYG_LABEL_DEFN(name)
ldc \t1,sr
.endm
# Merge the interrupt enable state of the status register in
# \sr with the current sr.
- .macro hal_cpu_int_merge sr,t1,t2
+ .macro hal_cpu_int_sp_merge sr,sp,t1,t2
stc sr,\t1
mov #CYGARC_REG_SR_IMASK>>1,\t2
shll \t2
and \t2,\sr
+ or \sr,\t1
+ ldc \t1,sr
+ mov \sp,r15
not \t2,\t2
and \t2,\t1
or \sr,\t1
ldc \t1,sr
.endm
Index: src/context.S
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/sh/arch/current/src/context.S,v
retrieving revision 1.6
diff -u -5 -p -r1.6 context.S
--- src/context.S 5 Dec 2003 17:06:23 -0000 1.6
+++ src/context.S 30 Jun 2005 10:47:28 -0000
@@ -174,15 +174,15 @@ FUNC_START(hal_thread_switch_context)
FUNC_START(hal_thread_load_context)
mov.l @r4,r0
- add #4+4,r0 ! skip r0 and r1
+ add #16,r0 ! skip r0-r3
!mov.l @r0+,r0
!mov.l @r0+,r1
- mov.l @r0+,r2
- mov.l @r0+,r3
+ !mov.l @r0+,r2
+ !mov.l @r0+,r3
mov.l @r0+,r4
mov.l @r0+,r5
mov.l @r0+,r6
mov.l @r0+,r7
mov.l @r0+,r8
@@ -238,14 +238,13 @@ FUNC_START(hal_thread_load_context)
lds.l @r0+,fpscr
#endif
lds.l @r0+,pr ! pr
- mov r3,r15 ! update stack pointer
-
mov.l @r0+,r2 ! SR
- hal_cpu_int_merge r2,r0,r1 ! restore interrupt state
+
+ hal_cpu_int_sp_merge r2,r3,r0,r1 ! restore interrupt state
rts ! and return
nop
#------------------------------------------------------------------------------
Index: src/vectors.S
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/sh/arch/current/src/vectors.S,v
retrieving revision 1.23
diff -u -5 -p -r1.23 vectors.S
--- src/vectors.S 5 Dec 2003 17:06:23 -0000 1.23
+++ src/vectors.S 30 Jun 2005 10:47:28 -0000
@@ -344,14 +344,14 @@ FUNC_START(hal_interrupt_stack_call_pend
nop
# Get old sr, pr, and stack values
mov.l @r15+,r3 ! get old sr
lds.l @r15+,pr ! get old pr
- mov.l @r15+,r15 ! get old stack pointer
+ mov.l @r15+,r2 ! get old stack pointer
# Restore SR interrupt state
- hal_cpu_int_merge r3,r0,r1
+ hal_cpu_int_sp_merge r3,r2,r0,r1
rts
nop
#endif // CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
#endif // CYGFUN_HAL_COMMON_KERNEL_SUPPORT