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Re: IO FLASH and caches
>>>>> "Edgar" == Edgar Grimberg <edgar.grimberg@zylin.com> writes:
>> What should happen is that the flash driver does whatever is
>> necessary to keep the cache and the flash contents coherent. I
>> believe the V2 AMD and Strata drivers should do the right
>> thing. _V2_CACHED_ONLY should not be defined because the Nios
>> II can bypass the cache when manipulating flash, so
>> _INTSCACHE_DEFAULT_END() should sync and invalidate the data
>> cache. When control returns to the generic flash code all stale
>> data should have been removed from the cache so the verify code
>> will see the new data.
Edgar> I am running STRATA V2. From documentation I've got the
Edgar> impression that, if I can bypass the caches by modifying
Edgar> the address, I don't need the _INTSCACHE_DEFAULT_END macro.
Edgar> I guess this is wrong.
If your HAL provides HAL_UNCACHED_ADDRESS() and does not implement the
CDL interface _V2_CACHED_ONLY then the AMD and V2 drivers should
provide sensible implementations of the _INTSCACHE_ macros themselves.
See the driver code for more details. For maximum flexibility the HALs
can provide alternative implementations of these macros, but that
should only be necessary in exceptional cases.
Bart
--
Bart Veer eCos Configuration Architect
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