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src/sim/mips ChangeLog Makefile.in configure.a ...
- From: chaoyingfu at sourceware dot org
- To: gdb-cvs at sources dot redhat dot com
- Date: 14 Dec 2005 23:07:56 -0000
- Subject: src/sim/mips ChangeLog Makefile.in configure.a ...
CVSROOT: /cvs/src
Module name: src
Changes by: chaoyingfu@sourceware.org 2005-12-14 23:07:56
Modified files:
sim/mips : ChangeLog Makefile.in configure.ac configure
mips.igen sim-main.h
Added files:
sim/mips : dsp.c dsp.igen
Log message:
* Makefile.in (SIM_OBJS): Add dsp.o.
(dsp.o): New dependency.
(IGEN_INCLUDE): Add dsp.igen.
* configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
mipsisa64*-*-*): Add dsp to sim_igen_machine.
* configure: Regenerate.
* mips.igen: Add dsp model and include dsp.igen.
(MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
because these instructions are extended in DSP ASE.
* sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
adding 6 DSP accumulator registers and 1 DSP control register.
(AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
DSPCR_CCOND_SMASK): New define.
(DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
* dsp.c, dsp.igen: New files for MIPS DSP ASE.
Patches:
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/mips/dsp.c.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/mips/dsp.igen.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/mips/ChangeLog.diff?cvsroot=src&r1=1.118&r2=1.119
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/mips/Makefile.in.diff?cvsroot=src&r1=1.10&r2=1.11
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/mips/configure.ac.diff?cvsroot=src&r1=1.5&r2=1.6
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/mips/configure.diff?cvsroot=src&r1=1.20&r2=1.21
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/mips/mips.igen.diff?cvsroot=src&r1=1.59&r2=1.60
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/mips/sim-main.h.diff?cvsroot=src&r1=1.27&r2=1.28