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src/gdb ChangeLog Makefile.in NEWS mips-tdep.c ...
- From: drow at sourceware dot org
- To: gdb-cvs at sourceware dot org
- Date: 13 Jun 2007 18:27:00 -0000
- Subject: src/gdb ChangeLog Makefile.in NEWS mips-tdep.c ...
CVSROOT: /cvs/src
Module name: src
Changes by: drow@sourceware.org 2007-06-13 18:27:00
Modified files:
gdb : ChangeLog Makefile.in NEWS mips-tdep.c
target-descriptions.c target-descriptions.h
gdb/doc : ChangeLog gdb.texinfo
gdb/testsuite : ChangeLog
gdb/testsuite/gdb.xml: tdesc-regs.exp
Added files:
gdb/features : mips-cp0.xml mips-cpu.xml mips-fpu.xml
mips64-cp0.xml mips64-cpu.xml mips64-fpu.xml
Log message:
* Makefile.in (mips-tdep.o): Update.
* mips-tdep.c (struct register_alias, mips_o32_aliases)
(mips_n32_n64_aliases, mips_register_aliases): New.
(mips_register_name): Call tdesc_register_name.
(mips_tdesc_register_reggroup_p): New.
(mips_pseudo_register_type, value_of_mips_user_reg): New.
(mips_gdbarch_init): Add target-described register support.
Register aliases for register names.
* target-descriptions.c (tdesc_register_name): Make global.
(tdesc_register_in_reggroup_p): New function, broken out from
tdesc_register_reggroup_p.
(tdesc_register_reggroup_p): Use it.
* target-descriptions.h (tdesc_register_name)
(tdesc_register_in_reggroup_p): New prototypes.
* NEWS: Correct formatting. Mention MIPS register support.
* features/mips-cp0.xml, features/mips-fpu.xml,
features/mips64-cp0.xml, gdb/features/mips64-fpu.xml, mips-cpu.xml,
features/mips64-cpu.xml: New files.
* gdb.xml/tdesc-regs.exp: Add MIPS support. Allow multiple
required features to be included.
* gdb.texinfo (MIPS Features): New subsection.
Patches:
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gdb/ChangeLog.diff?cvsroot=src&r1=1.8459&r2=1.8460
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gdb/Makefile.in.diff?cvsroot=src&r1=1.917&r2=1.918
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gdb/NEWS.diff?cvsroot=src&r1=1.228&r2=1.229
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gdb/mips-tdep.c.diff?cvsroot=src&r1=1.427&r2=1.428
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gdb/target-descriptions.c.diff?cvsroot=src&r1=1.8&r2=1.9
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gdb/target-descriptions.h.diff?cvsroot=src&r1=1.6&r2=1.7
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gdb/doc/ChangeLog.diff?cvsroot=src&r1=1.674&r2=1.675
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gdb/doc/gdb.texinfo.diff?cvsroot=src&r1=1.411&r2=1.412
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gdb/features/mips-cp0.xml.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gdb/features/mips-cpu.xml.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gdb/features/mips-fpu.xml.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gdb/features/mips64-cp0.xml.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gdb/features/mips64-cpu.xml.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gdb/features/mips64-fpu.xml.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gdb/testsuite/ChangeLog.diff?cvsroot=src&r1=1.1411&r2=1.1412
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gdb/testsuite/gdb.xml/tdesc-regs.exp.diff?cvsroot=src&r1=1.1&r2=1.2