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src/sim/bfin ChangeLog bfin-sim.c
- From: vapier at sourceware dot org
- To: gdb-cvs at sourceware dot org
- Date: 15 Mar 2011 20:10:13 -0000
- Subject: src/sim/bfin ChangeLog bfin-sim.c
CVSROOT: /cvs/src
Module name: src
Changes by: vapier@sourceware.org 2011-03-15 20:10:12
Modified files:
sim/bfin : ChangeLog bfin-sim.c
Log message:
sim: bfin: skip acc/ASTAT updates for moves
No point in moving unchanged acc values to the acc regs, and avoid
updating the acc ASTAT bits when only reading. This fixes incorrect
changing of the ASTAT bits when they're only being read.
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Patches:
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/bfin/ChangeLog.diff?cvsroot=src&r1=1.5&r2=1.6
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/bfin/bfin-sim.c.diff?cvsroot=src&r1=1.5&r2=1.6