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src/sim/bfin ChangeLog bfin-sim.c
- From: vapier at sourceware dot org
- To: gdb-cvs at sourceware dot org
- Date: 16 Apr 2011 17:37:55 -0000
- Subject: src/sim/bfin ChangeLog bfin-sim.c
CVSROOT: /cvs/src
Module name: src
Changes by: vapier@sourceware.org 2011-04-16 17:37:55
Modified files:
sim/bfin : ChangeLog bfin-sim.c
Log message:
sim: bfin: use store buffer with more 32bit insns
A bunch of 32bit insns were not using the store buffer, so when they were
used in parallel insns, they would incorrectly clobber a register early.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Patches:
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/bfin/ChangeLog.diff?cvsroot=src&r1=1.31&r2=1.32
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/bfin/bfin-sim.c.diff?cvsroot=src&r1=1.15&r2=1.16