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src/sim/bfin ChangeLog dv-bfin_uart2.c
- From: vapier at sourceware dot org
- To: gdb-cvs at sourceware dot org
- Date: 9 May 2011 18:14:01 -0000
- Subject: src/sim/bfin ChangeLog dv-bfin_uart2.c
CVSROOT: /cvs/src
Module name: src
Changes by: vapier@sourceware.org 2011-05-09 18:14:01
Modified files:
sim/bfin : ChangeLog dv-bfin_uart2.c
Log message:
sim: bfin: fix UART LSR read-only bit saturation
A few bits in the newer UART LSR register are not sticky, so make sure
we clear them when returning updated status rather than leaving them
always set.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Patches:
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/bfin/ChangeLog.diff?cvsroot=src&r1=1.35&r2=1.36
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/bfin/dv-bfin_uart2.c.diff?cvsroot=src&r1=1.4&r2=1.5