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src/sim/bfin ChangeLog dv-bfin_sic.c


CVSROOT:	/cvs/src
Module name:	src
Changes by:	vapier@sourceware.org	2012-03-31 18:48:21

Modified files:
	sim/bfin       : ChangeLog dv-bfin_sic.c 

Log message:
	sim: bfin: fix typo in BF54x SIC init
	
	The current code triggers a warning:
	dv-bfin_sic.c: In function 'bfin_sic_finish':
	dv-bfin_sic.c:930:41: warning: operation on 'sic-><U78e8>.bf54x.iwr1'
	may be undefined [-Wsequence-point]
	
	This points out the IWR2 register was not being setup because of a typo.
	
	Signed-off-by: Mike Frysinger <vapier@gentoo.org>

Patches:
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/bfin/ChangeLog.diff?cvsroot=src&r1=1.74&r2=1.75
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/bfin/dv-bfin_sic.c.diff?cvsroot=src&r1=1.8&r2=1.9


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