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src/sim/bfin ChangeLog bfin-sim.c
- From: vapier at sourceware dot org
- To: gdb-cvs at sourceware dot org
- Date: 1 Apr 2012 04:31:47 -0000
- Subject: src/sim/bfin ChangeLog bfin-sim.c
CVSROOT: /cvs/src
Module name: src
Changes by: vapier@sourceware.org 2012-04-01 04:31:47
Modified files:
sim/bfin : ChangeLog bfin-sim.c
Log message:
sim: bfin: throw VEC_ILGAL_I with 32bit insn in group1/group2 slots
Parallel insns can only do one 32bit, then two 16bits. So if we see
a 2nd 32bit insn after the first 32bit in a parallel insn, abort.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Patches:
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/bfin/ChangeLog.diff?cvsroot=src&r1=1.78&r2=1.79
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/bfin/bfin-sim.c.diff?cvsroot=src&r1=1.33&r2=1.34