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sim/d10v, fix SIGILL behavour
- To: GDB Patches <gdb-patches at sourceware dot cygnus dot com>
- Subject: sim/d10v, fix SIGILL behavour
- From: Andrew Cagney <ac131313 at cygnus dot com>
- Date: Tue, 18 Apr 2000 17:49:33 +1000
- Organization: Cygnus Solutions
FYI,
I've committed the attatched. For the curious, it allows the user to
step through a reserved instruction exception when using the simulator.
Andrew
Tue Apr 18 16:26:41 2000 Andrew Cagney <cagney@b1.cygnus.com>
* interp.c (sim_resume): Deliver SIGILL.
(lookup_hash): Do not print SIGILL message.
Tue Apr 18 16:32:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
* t-rie-xx.s (test_rie_xx): New test.
* Makefile.in (TESTS): Update.
Index: d10v/interp.c
===================================================================
RCS file: /cvs/cvsfiles/devo/sim/d10v/interp.c,v
retrieving revision 1.51.4.13
diff -p -r1.51.4.13 interp.c
*** interp.c 2000/02/23 07:27:42 1.51.4.13
--- interp.c 2000/04/18 07:21:24
*************** lookup_hash (ins, size)
*** 99,106 ****
{
if (h->next == NULL)
{
- (*d10v_callback->printf_filtered)
- (d10v_callback, "ERROR: Illegal instruction %x at PC %x\n", ins, PC);
State.exception = SIGILL;
State.pc_changed = 1; /* Don't increment the PC. */
return NULL;
--- 99,104 ----
*************** sim_resume (sd, step, siggnal)
*** 977,982 ****
--- 975,987 ----
SET_BPSW (PSW);
SET_HW_PSW ((PSW & (PSW_F0_BIT | PSW_F1_BIT | PSW_C_BIT)));
JMP (AE_VECTOR_START);
+ SLOT_FLUSH ();
+ break;
+ case SIGILL:
+ SET_BPC (PC);
+ SET_BPSW (PSW);
+ SET_HW_PSW ((PSW & (PSW_F0_BIT | PSW_F1_BIT | PSW_C_BIT)));
+ JMP (RIE_VECTOR_START);
SLOT_FLUSH ();
break;
default:
Index: testsuite/d10v-elf/Makefile.in
===================================================================
RCS file: /cvs/cvsfiles/devo/sim/testsuite/d10v-elf/Makefile.in,v
retrieving revision 1.16.2.2
diff -p -r1.16.2.2 Makefile.in
*** Makefile.in 2000/02/23 07:30:13 1.16.2.2
--- Makefile.in 2000/04/18 07:21:27
*************** TESTS = \
*** 82,87 ****
--- 82,88 ----
t-ae-st2w-im.ok \
t-ae-st2w-ip.ok \
t-ae-st2w-is.ok \
+ t-rie-xx.ok \
#
AS_FOR_TARGET = `\
Index: testsuite/d10v-elf/t-rie-xx.s
===================================================================
RCS file: t-rie-xx.s
diff -N t-rie-xx.s
*** /dev/null Tue May 5 13:32:27 1998
--- t-rie-xx.s Tue Apr 18 00:21:27 2000
***************
*** 0 ****
--- 1,12 ----
+ .include "t-macros.i"
+
+ start
+
+ PSW_BITS = 0
+ point_dmap_at_imem
+ check_interrupt (VEC_RIE&DMAP_MASK)+DMAP_BASE PSW_BITS test_rie_xx
+
+ test_rie_xx:
+ .short 0xe120, 0x0000 ;; Example of RIE code
+ nop
+ exit47