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A few more am33 unsigned SP-offset fixes.
- To: gdb-patches at sourceware dot cygnus dot com
- Subject: A few more am33 unsigned SP-offset fixes.
- From: Alexandre Oliva <aoliva at cygnus dot com>
- Date: 22 May 2000 04:26:14 -0300
- Organization: Cygnus Solutions, a Red Hat Company
On Apr 9th, I had posted a patch for the mn10300 sim that fixed insns
involving SP offsets so that they'd zero-extend the offsets, as
specified in the AM33 Instruction Manual. Unfortunately, I had missed
some insns, because their leading comments were wrong :-(
Here's a patch that fixes the comments and the insns. Ok to install?
Index: sim/mn10300/ChangeLog
from Alexandre Oliva <aoliva@cygnus.com>
* am33.igen: Fix leading comments of SP-relative offset insns that
referred to other registers. Make their offsets unsigned.
Index: sim/mn10300/am33.igen
===================================================================
RCS file: /cvs/cvsfiles/devo/sim/mn10300/am33.igen,v
retrieving revision 1.30
diff -u -r1.30 am33.igen
--- sim/mn10300/am33.igen 2000/05/18 23:03:48 1.30
+++ sim/mn10300/am33.igen 2000/05/22 07:03:43
@@ -2340,7 +2340,7 @@
State.regs[dstreg] = load_word (State.regs[REG_SP] + IMM8);
}
-// 1111 1011 1001 1010 Rm 0000 IMM8; mov Rm,(d8,Rn)
+// 1111 1011 1001 1010 Rm 0000 IMM8; mov Rm,(d8,sp)
8.0xfb+8.0x9a+4.RM2,4.0x0+8.IMM8:D2o:::mov
"mov"
*am33
@@ -2352,7 +2352,7 @@
PC = cia;
srcreg = translate_rreg (SD_, RM2);
- store_word (State.regs[REG_SP] + EXTEND8 (IMM8), State.regs[srcreg]);
+ store_word (State.regs[REG_SP] + IMM8, State.regs[srcreg]);
}
// 1111 1011 1010 1010 Rn Rm IMM8; movbu (d8,sp),Rn
@@ -2370,7 +2370,7 @@
State.regs[dstreg] = load_byte (State.regs[REG_SP] + IMM8);
}
-// 1111 1011 1011 1010 Rn Rm IMM8; movbu Rm,(sp,Rn)
+// 1111 1011 1011 1010 Rn Rm IMM8; movbu Rm,(d8,sp)
8.0xfb+8.0xba+4.RM2,4.0x0+8.IMM8:D2o:::movbu
"movbu"
*am33
@@ -2382,7 +2382,7 @@
PC = cia;
srcreg = translate_rreg (SD_, RM2);
- store_byte (State.regs[REG_SP] + EXTEND8 (IMM8), State.regs[srcreg]);
+ store_byte (State.regs[REG_SP] + IMM8, State.regs[srcreg]);
}
// 1111 1011 1100 1010 Rn Rm IMM8; movhu (d8,sp),Rn
@@ -4181,7 +4181,7 @@
State.regs[srcreg]);
}
-// 1111 1101 1010 1010 Rn 0000 IMM24; movbu (d24,Rm),Rn
+// 1111 1101 1010 1010 Rn 0000 IMM24; movbu (d24,sp),Rn
8.0xfd+8.0xaa+4.RN2,4.0x0+8.IMM24A+8.IMM24B+8.IMM24C:D4r:::movbu
"movbu"
*am33
@@ -4194,8 +4194,7 @@
PC = cia;
dstreg = translate_rreg (SD_, RN2);
State.regs[dstreg] = load_byte (State.regs[REG_SP]
- + EXTEND24 (FETCH24 (IMM24A,
- IMM24B, IMM24C)));
+ + FETCH24 (IMM24A, IMM24B, IMM24C));
}
// 1111 1101 1011 1010 Rm 0000 IMM24; movbu Rm,(d24,sp)
--
Alexandre Oliva Enjoy Guaranį, see http://www.ic.unicamp.br/~oliva/
Cygnus Solutions, a Red Hat company aoliva@{redhat, cygnus}.com
Free Software Developer and Evangelist CS PhD student at IC-Unicamp
oliva@{lsd.ic.unicamp.br, gnu.org} Write to mailing lists, not to me