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ARM sim: preserve [CS]PSR's T bit and unused bits


I'm checking this in, approved by Nick Clifton:

Index: sim/arm/ChangeLog
from  Alexandre Oliva  <aoliva@redhat.com>
	* armemu.h (GETSPSR): Call ARMul_GetSPSR().
	* armsupp.c (ARMul_CPSRAltered): Zero out bits as they're
	extracted from state->Cpsr, but preserve the unused bits.
	(ARMul_GetCPSR): Get bits preserved in state->Cpsr.
	(ARMul_GetSPSR, ARMul_FixCPSR): Use ARMul_GetCPSR() to
	get the full CPSR word.

Index: sim/arm/armemu.h
===================================================================
RCS file: /cvs/src/src/sim/arm/armemu.h,v
retrieving revision 1.4
diff -u -r1.4 armemu.h
--- sim/arm/armemu.h	2000/07/04 06:06:30	1.4
+++ sim/arm/armemu.h	2000/07/04 06:14:31
@@ -163,7 +163,7 @@
 #define PATCHR15 state->Reg[15] = ECC | ER15INT | EMODE | R15PC
 #endif
 
-#define GETSPSR(bank) bank>0?state->Spsr[bank]:ECC | EINT | EMODE ;
+#define GETSPSR(bank) (ARMul_GetSPSR (state, EMODE))
 #define SETPSR_F(d,s) d = ((d) & ~PSR_FBITS) | ((s) & PSR_FBITS)
 #define SETPSR_S(d,s) d = ((d) & ~PSR_SBITS) | ((s) & PSR_SBITS)
 #define SETPSR_X(d,s) d = ((d) & ~PSR_XBITS) | ((s) & PSR_XBITS)
Index: sim/arm/armsupp.c
===================================================================
RCS file: /cvs/src/src/sim/arm/armsupp.c,v
retrieving revision 1.5
diff -u -r1.5 armsupp.c
--- sim/arm/armsupp.c	2000/07/04 06:06:30	1.5
+++ sim/arm/armsupp.c	2000/07/04 06:14:31
@@ -183,7 +183,7 @@
 ARMword
 ARMul_GetCPSR (ARMul_State * state)
 {
-  return (CPSR);
+  return (CPSR | state->Cpsr);
 }
 
 /***************************************************************************\
@@ -205,7 +205,7 @@
 void
 ARMul_FixCPSR (ARMul_State * state, ARMword instr, ARMword rhs)
 {
-  state->Cpsr = CPSR;
+  state->Cpsr = ARMul_GetCPSR (state);
   if (state->Bank != USERBANK)
     {				/* In user mode, only write flags */
       if (BIT (16))
@@ -230,7 +230,7 @@
   ARMword bank = ModeToBank (mode & MODEBITS);
 
   if (! BANK_CAN_ACCESS_SPSR (bank))
-    return CPSR;
+    return ARMul_GetCPSR (state);
 
   return state->Spsr[bank];
 }
@@ -290,14 +290,21 @@
       
       state->NtransSig = (state->Mode & 3) ? HIGH : LOW;
     }
+  state->Cpsr &= ~MODEBITS;
 
   ASSIGNINT (state->Cpsr & INTBITS);
+  state->Cpsr &= ~INTBITS;
   ASSIGNN ((state->Cpsr & NBIT) != 0);
+  state->Cpsr &= ~NBIT;
   ASSIGNZ ((state->Cpsr & ZBIT) != 0);
+  state->Cpsr &= ~ZBIT;
   ASSIGNC ((state->Cpsr & CBIT) != 0);
+  state->Cpsr &= ~CBIT;
   ASSIGNV ((state->Cpsr & VBIT) != 0);
+  state->Cpsr &= ~VBIT;
 #ifdef MODET
   ASSIGNT ((state->Cpsr & TBIT) != 0);
+  state->Cpsr &= ~TBIT;
 #endif
 
   if (oldmode > SVC26MODE)

-- 
Alexandre Oliva   Enjoy Guarana', see http://www.ic.unicamp.br/~oliva/
Red Hat GCC Developer                  aoliva@{cygnus.com, redhat.com}
CS PhD student at IC-Unicamp        oliva@{lsd.ic.unicamp.br, gnu.org}
Free Software Evangelist    *Please* write to mailing lists, not to me

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