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[PATCH]: Remove soft reg hack in the 68hc11 simulator
- To: gdb-patches at sourceware dot cygnus dot com
- Subject: [PATCH]: Remove soft reg hack in the 68hc11 simulator
- From: Stephane Carrez <Stephane dot Carrez at worldnet dot fr>
- Date: Sun, 10 Sep 2000 18:11:20 +0200
Hi!
I've committed the following patch to remove the soft register hack
I made in the 68hc11 simulator. The hack is no longer necessary since
Gdb handle them by reading/writing the memory.
Stephane
2000-09-10 Stephane Carrez <Stephane.Carrez@worldnet.fr>
* interp.c (sim_store_register): Remove soft register hack.
(sim_fetch_register): Likewise.
(sim_create_inferior): Likewise.
* sim-main.h: Likewise.
Index: interp.c
===================================================================
RCS file: /cvs/src/src/sim/m68hc11/interp.c,v
retrieving revision 1.2
diff -p -r1.2 interp.c
*** interp.c 2000/08/11 18:44:59 1.2
--- interp.c 2000/09/10 14:04:16
*************** sim_create_inferior (SIM_DESC sd, struct
*** 325,356 ****
/* reset all state information */
sim_board_reset (sd);
- /* Get information about the number of pseudo registers. */
- for (i = FIRST_SOFT_REGNUM; i <= ZD32_REGNUM; i++)
- {
- switch (i)
- {
- case TMP_REGNUM:
- cpu->cpu_page0_reg[i - FIRST_SOFT_REGNUM] = 0;
- break;
- case Z_REGNUM:
- case ZS_REGNUM:
- cpu->cpu_page0_reg[i - FIRST_SOFT_REGNUM] = 2;
- break;
- case XY_REGNUM:
- cpu->cpu_page0_reg[i - FIRST_SOFT_REGNUM] = 4;
- break;
- case FP_REGNUM:
- cpu->cpu_page0_reg[i - FIRST_SOFT_REGNUM] = 6;
- break;
- default:
- cpu->cpu_page0_reg[i - FIRST_SOFT_REGNUM]
- = ((i - FIRST_SOFT_REGNUM) * 2) - 2;
- break;
- }
- }
- cpu->cpu_nb_pseudo_regs = 8;
-
return SIM_RC_OK;
}
--- 325,330 ----
*************** sim_fetch_register (SIM_DESC sd, int rn,
*** 403,423 ****
val = cpu_get_ccr (cpu);
break;
-
- /* Read a pseudo register. Pseudo registers are located at
- beginning of page 0. Each of them is 2 bytes. */
default:
! if (rn < FIRST_SOFT_REGNUM || rn >= ZD32_REGNUM)
! {
! val = 0;
! }
! else
! {
! uint16 addr;
!
! addr = cpu->cpu_page0_reg[rn - FIRST_SOFT_REGNUM];
! val = memory_read16 (cpu, addr);
! }
break;
}
memory[0] = val >> 8;
--- 377,384 ----
val = cpu_get_ccr (cpu);
break;
default:
! val = 0;
break;
}
memory[0] = val >> 8;
*************** sim_store_register (SIM_DESC sd, int rn,
*** 471,486 ****
cpu_set_ccr (cpu, val);
break;
- /* Write a pseudo register. Pseudo registers are located at
- beginning of page 0. Each of them is 2 bytes. */
default:
- if (rn >= FIRST_SOFT_REGNUM && rn <= ZD32_REGNUM)
- {
- uint16 addr;
-
- addr = cpu->cpu_page0_reg[rn - FIRST_SOFT_REGNUM];
- memory_write16 (cpu, addr, val);
- }
break;
}
--- 432,438 ----
Index: sim-main.h
===================================================================
RCS file: /cvs/src/src/sim/m68hc11/sim-main.h,v
retrieving revision 1.3
diff -p -r1.3 sim-main.h
*** sim-main.h 2000/09/09 21:00:39 1.3
--- sim-main.h 2000/09/10 14:04:23
*************** enum m68hc11_map_level
*** 75,90 ****
#define B_REGNUM 6
#define PSW_REGNUM 7
#define Z_REGNUM 8
- #define FP_REGNUM 9
- #define TMP_REGNUM 10
- #define ZS_REGNUM 11
- #define XY_REGNUM 12
- #define ZD1_REGNUM 13
- #define ZD32_REGNUM (ZD1_REGNUM+31)
- #define FIRST_SOFT_REGNUM (Z_REGNUM)
- #define MAX_SOFT_REG (ZD32_REGNUM - Z_REGNUM + 1)
-
typedef struct m6811_regs {
unsigned short d;
unsigned short ix;
--- 75,81 ----
*************** struct _sim_cpu {
*** 186,193 ****
int cpu_elf_start;
uint16 cpu_insn_pc;
- unsigned short cpu_nb_pseudo_regs;
- uint16 cpu_page0_reg[MAX_SOFT_REG];
/* CPU frequency. This is the quartz frequency. It is divided by 4 to
get the cycle time. This is used for the timer rate and for the baud
--- 177,182 ----