[PATCH]: Fix HC11/HC12 single stepping in simulator

[Stephane Carrez <Stephane dot Carrez at worldnet dot fr>]

Hi!

I've committed the following patch for HC11/HC12 simulator to fix the
single stepping with the simulator.  The problem is that after each instruction
the tick counter is incremented by the number of cycles the instruction
took.  Then, events are scheduled and it often happens that there are pending
ticks to process when breakpoints/single step events are processed.  The next
time the simulator is resumed, if the single step event is inserted before
re-scheduling events, the pending ticks will activate the single step and the
simulator will stop without having processed any instruction.  To solve this,
the single step event is inserted after having processed the pending ticks.

	Stephane

2001-07-22  Stephane Carrez  <Stephane.Carrez@worldnet.fr>

	* Makefile.in (SIM_OBJS): Remove sim-resume.o
	* interp.c (sim_resume): New function from sim-resume.c, install
	the stepping event after having processed the pending ticks.
	(has_stepped): Likewise.
	(sim_info): Produce an output only if verbose or STATE_VERBOSE_P.
Index: interp.c
===================================================================
RCS file: /cvs/src/src/sim/m68hc11/interp.c,v
retrieving revision 1.4
diff -u -p -r1.4 interp.c
--- interp.c	2001/05/20 15:40:27	1.4
+++ interp.c	2001/07/22 12:32:30
@@ -437,6 +437,10 @@ sim_info (SIM_DESC sd, int verbose)
   const char *cpu_type;
   const struct bfd_arch_info *arch;
 
+  /* Nothing to do if there is no verbose flag set.  */
+  if (verbose == 0 && STATE_VERBOSE_P (sd) == 0)
+    return;
+
   arch = STATE_ARCHITECTURE (sd);
   if (arch->arch == bfd_arch_m68hc11)
     cpu_type = "68HC11";
@@ -600,4 +604,80 @@ sim_do_command (SIM_DESC sd, char *cmd)
   /* If the architecture changed, re-configure.  */
   if (STATE_ARCHITECTURE (sd) != cpu->cpu_configured_arch)
     sim_hw_configure (sd);
+}
+
+/* Halt the simulator after just one instruction */
+
+static void
+has_stepped (SIM_DESC sd,
+	     void *data)
+{
+  ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
+  sim_engine_halt (sd, NULL, NULL, NULL_CIA, sim_stopped, SIM_SIGTRAP);
+}
+
+
+/* Generic resume - assumes the existance of sim_engine_run */
+
+void
+sim_resume (SIM_DESC sd,
+	    int step,
+	    int siggnal)
+{
+  sim_engine *engine = STATE_ENGINE (sd);
+  jmp_buf buf;
+  int jmpval;
+
+  ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
+
+  /* we only want to be single stepping the simulator once */
+  if (engine->stepper != NULL)
+    {
+      sim_events_deschedule (sd, engine->stepper);
+      engine->stepper = NULL;
+    }
+  sim_module_resume (sd);
+
+  /* run/resume the simulator */
+  engine->jmpbuf = &buf;
+  jmpval = setjmp (buf);
+  if (jmpval == sim_engine_start_jmpval
+      || jmpval == sim_engine_restart_jmpval)
+    {
+      int last_cpu_nr = sim_engine_last_cpu_nr (sd);
+      int next_cpu_nr = sim_engine_next_cpu_nr (sd);
+      int nr_cpus = sim_engine_nr_cpus (sd);
+
+      sim_events_preprocess (sd, last_cpu_nr >= nr_cpus, next_cpu_nr >= nr_cpus);
+      if (next_cpu_nr >= nr_cpus)
+	next_cpu_nr = 0;
+
+      /* Only deliver the siggnal ]sic] the first time through - don't
+         re-deliver any siggnal during a restart. */
+      if (jmpval == sim_engine_restart_jmpval)
+	siggnal = 0;
+
+      /* Install the stepping event after having processed some
+         pending events.  This is necessary for HC11/HC12 simulator
+         because the tick counter is incremented by the number of cycles
+         the instruction took.  Some pending ticks to process can still
+         be recorded internally by the simulator and sim_events_preprocess
+         will handle them.  If the stepping event is inserted before,
+         these pending ticks will raise the event and the simulator will
+         stop without having executed any instruction.  */
+      if (step)
+        engine->stepper = sim_events_schedule (sd, 0, has_stepped, sd);
+
+#ifdef SIM_CPU_EXCEPTION_RESUME
+      {
+	sim_cpu* cpu = STATE_CPU (sd, next_cpu_nr);
+	SIM_CPU_EXCEPTION_RESUME(sd, cpu, siggnal);
+      }
+#endif
+
+      sim_engine_run (sd, next_cpu_nr, nr_cpus, siggnal);
+    }
+  engine->jmpbuf = NULL;
+
+  sim_module_suspend (sd);
 }
Index: Makefile.in
===================================================================
RCS file: /cvs/src/src/sim/m68hc11/Makefile.in,v
retrieving revision 1.3
diff -u -p -r1.3 Makefile.in
--- Makefile.in	2001/07/10 22:46:59	1.3
+++ Makefile.in	2001/07/22 12:32:30
@@ -30,7 +30,6 @@ SIM_OBJS = $(M68HC11_OBJS) \
 	sim-hload.o \
 	sim-engine.o \
 	sim-stop.o \
-	sim-resume.o \
 	sim-hrw.o \
 	sim-reason.o \
         $(SIM_EXTRA_OBJS)