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[patch] pure-muti-arch mn10300.
- To: gdb-patches at sources dot redhat dot com
- Subject: [patch] pure-muti-arch mn10300.
- From: Andrew Cagney <ac131313 at cygnus dot com>
- Date: Sat, 11 Aug 2001 23:23:51 -0400
FYI,
I'm checking in the attached as an obvious fix. It makes the mn10300
target pure-multi-arch.
Andrew
2001-08-11 Andrew Cagney <ac131313@redhat.com>
* config/mn10300/mn10300.mt (TM_FILE): Delete.
* configure.tgt: Add mn10300 to list of mulit-arch targets.
* config/mn10300/tm-mn10300.h: Delete file. Move contents ...
* mn10300-tdep.c: To here.
Index: configure.tgt
===================================================================
RCS file: /cvs/src/src/gdb/configure.tgt,v
retrieving revision 1.34
diff -p -r1.34 configure.tgt
*** configure.tgt 2001/07/19 05:10:38 1.34
--- configure.tgt 2001/08/12 03:02:07
*************** case "${gdb_target}" in
*** 324,327 ****
--- 324,328 ----
cris) gdb_multi_arch=yes ;;
d10v) gdb_multi_arch=yes ;;
m68hc11) gdb_multi_arch=yes ;;
+ mn10300) gdb_multi_arch=yes ;;
esac
Index: mn10300-tdep.c
===================================================================
RCS file: /cvs/src/src/gdb/mn10300-tdep.c,v
retrieving revision 1.20
diff -p -r1.20 mn10300-tdep.c
*** mn10300-tdep.c 2001/08/12 02:10:18 1.20
--- mn10300-tdep.c 2001/08/12 03:02:11
***************
*** 32,37 ****
--- 32,64 ----
#include "regcache.h"
#include "arch-utils.h"
+ #define D0_REGNUM 0
+ #define D2_REGNUM 2
+ #define D3_REGNUM 3
+ #define A0_REGNUM 4
+ #define A2_REGNUM 6
+ #define A3_REGNUM 7
+ #define MDR_REGNUM 10
+ #define PSW_REGNUM 11
+ #define LIR_REGNUM 12
+ #define LAR_REGNUM 13
+ #define MDRQ_REGNUM 14
+ #define E0_REGNUM 15
+ #define MCRH_REGNUM 26
+ #define MCRL_REGNUM 27
+ #define MCVF_REGNUM 28
+
+ enum movm_register_bits {
+ movm_exother_bit = 0x01,
+ movm_exreg1_bit = 0x02,
+ movm_exreg0_bit = 0x04,
+ movm_other_bit = 0x08,
+ movm_a3_bit = 0x10,
+ movm_a2_bit = 0x20,
+ movm_d3_bit = 0x40,
+ movm_d2_bit = 0x80
+ };
+
extern void _initialize_mn10300_tdep (void);
static CORE_ADDR mn10300_analyze_prologue (struct frame_info *fi,
CORE_ADDR pc);
Index: config/mn10300/mn10300.mt
===================================================================
RCS file: /cvs/src/src/gdb/config/mn10300/mn10300.mt,v
retrieving revision 1.1.1.1
diff -p -r1.1.1.1 mn10300.mt
*** mn10300.mt 1999/04/16 01:34:23 1.1.1.1
--- mn10300.mt 2001/08/12 03:02:13
***************
*** 1,6 ****
# Target: Matsushita mn10300
TDEPFILES= mn10300-tdep.o
- TM_FILE= tm-mn10300.h
-
SIM_OBS = remote-sim.o
SIM = ../sim/mn10300/libsim.a
--- 1,4 ----
Index: config/mn10300/tm-mn10300.h
===================================================================
RCS file: tm-mn10300.h
diff -N tm-mn10300.h
*** /sourceware/cvs-tmp/cvsByGi0Z Sat Aug 11 20:02:16 2001
--- /dev/null Tue May 5 13:32:27 1998
***************
*** 1,71 ****
- /* Parameters for execution on a Matsushita mn10300 processor.
- Copyright 1996, 1997, 1998, 1999, 2000, 2001
- Free Software Foundation, Inc.
-
- Contributed by Geoffrey Noer <noer@cygnus.com>
-
- This file is part of GDB.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330,
- Boston, MA 02111-1307, USA. */
-
- #define GDB_MULTI_ARCH 1
-
- /* The mn10300 is little endian. */
- #define TARGET_BYTE_ORDER_DEFAULT LITTLE_ENDIAN
-
- /* All registers are 32bits (phew!). */
- #if !GDB_MULTI_ARCH
- #define REGISTER_SIZE 4
- #define MAX_REGISTER_RAW_SIZE 4
- #define NUM_REGS 32
- #endif
-
- #if !GDB_MULTI_ARCH
- #define REGISTER_VIRTUAL_TYPE(REG) builtin_type_int
- #endif
-
- #if !GDB_MULTI_ARCH
- #define REGISTER_BYTE(REG) ((REG) * 4)
- #define REGISTER_VIRTUAL_SIZE(REG) 4
- #define REGISTER_RAW_SIZE(REG) 4
- #endif
-
- #define D0_REGNUM 0
- #define D2_REGNUM 2
- #define D3_REGNUM 3
- #define A0_REGNUM 4
- #define A2_REGNUM 6
- #define A3_REGNUM 7
- #define MDR_REGNUM 10
- #define PSW_REGNUM 11
- #define LIR_REGNUM 12
- #define LAR_REGNUM 13
- #define MDRQ_REGNUM 14
- #define E0_REGNUM 15
- #define MCRH_REGNUM 26
- #define MCRL_REGNUM 27
- #define MCVF_REGNUM 28
-
- enum movm_register_bits {
- movm_exother_bit = 0x01,
- movm_exreg1_bit = 0x02,
- movm_exreg0_bit = 0x04,
- movm_other_bit = 0x08,
- movm_a3_bit = 0x10,
- movm_a2_bit = 0x20,
- movm_d3_bit = 0x40,
- movm_d2_bit = 0x80
- };
--- 0 ----