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[5.1] true64 tweek


Hello,

Going over the thread:

http://sources.redhat.com/ml/gdb-patches/2001-05/msg00119.html

I've come up with the attached tweek.  Could someone please give it a wirl.

Andrew
2001-10-14  Andrew Cagney  <ac131313@redhat.com>

	* alpha-nat.c: Include <alpha/coreregs.h> instead of
	<machine/reg.h>.
	(fetch_osf_core_registers): Define core_reg_mapping in a way that
	works on OSF5 as well as previous OSF versions.

Index: alpha-nat.c
===================================================================
RCS file: /cvs/src/src/gdb/alpha-nat.c,v
retrieving revision 1.7
diff -p -r1.7 alpha-nat.c
*** alpha-nat.c	2001/03/06 08:21:05	1.7
--- alpha-nat.c	2001/10/14 22:31:39
***************
*** 29,35 ****
  #include <asm/reg.h>
  #include <alpha/ptrace.h>
  #else
! #include <machine/reg.h>
  #endif
  #include <sys/user.h>
  
--- 29,35 ----
  #include <asm/reg.h>
  #include <alpha/ptrace.h>
  #else
! #include <alpha/coreregs.h>
  #endif
  #include <sys/user.h>
  
*************** fetch_osf_core_registers (char *core_reg
*** 93,102 ****
    register int addr;
    int bad_reg = -1;
  
!   /* Table to map a gdb regnum to an index in the core register section.
!      The floating point register values are garbage in OSF/1.2 core files.  */
    static int core_reg_mapping[NUM_REGS] =
    {
  #define EFL (EF_SIZE / 8)
      EF_V0, EF_T0, EF_T1, EF_T2, EF_T3, EF_T4, EF_T5, EF_T6,
      EF_T7, EF_S0, EF_S1, EF_S2, EF_S3, EF_S4, EF_S5, EF_S6,
--- 93,117 ----
    register int addr;
    int bad_reg = -1;
  
!   /* Table to map a gdb regnum to an index in the core register
!      section.  The floating point register values are garbage in
!      OSF/1.2 core files.  OSF5 uses different names for the register
!      enum list, need to handle two cases.  The actual values are the
!      same.  */
    static int core_reg_mapping[NUM_REGS] =
    {
+ #ifdef NCF_REGS
+ #define EFL NCF_REGS
+     CF_V0, CF_T0, CF_T1, CF_T2, CF_T3, CF_T4, CF_T5, CF_T6,
+     CF_T7, CF_S0, CF_S1, CF_S2, CF_S3, CF_S4, CF_S5, CF_S6,
+     CF_A0, CF_A1, CF_A2, CF_A3, CF_A4, CF_A5, CF_T8, CF_T9,
+     CF_T10, CF_T11, CF_RA, CF_T12, CF_AT, CF_GP, CF_SP, -1,
+     EFL + 0, EFL + 1, EFL + 2, EFL + 3, EFL + 4, EFL + 5, EFL + 6, EFL + 7,
+     EFL + 8, EFL + 9, EFL + 10, EFL + 11, EFL + 12, EFL + 13, EFL + 14, EFL + 15,
+     EFL + 16, EFL + 17, EFL + 18, EFL + 19, EFL + 20, EFL + 21, EFL + 22, EFL + 23,
+     EFL + 24, EFL + 25, EFL + 26, EFL + 27, EFL + 28, EFL + 29, EFL + 30, EFL + 31,
+     CF_PC, -1
+ #else
  #define EFL (EF_SIZE / 8)
      EF_V0, EF_T0, EF_T1, EF_T2, EF_T3, EF_T4, EF_T5, EF_T6,
      EF_T7, EF_S0, EF_S1, EF_S2, EF_S3, EF_S4, EF_S5, EF_S6,
*************** fetch_osf_core_registers (char *core_reg
*** 107,112 ****
--- 122,128 ----
      EFL + 16, EFL + 17, EFL + 18, EFL + 19, EFL + 20, EFL + 21, EFL + 22, EFL + 23,
      EFL + 24, EFL + 25, EFL + 26, EFL + 27, EFL + 28, EFL + 29, EFL + 30, EFL + 31,
      EF_PC, -1
+ #endif
    };
    static char zerobuf[MAX_REGISTER_RAW_SIZE] =
    {0};

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