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Re: SH5 simulator contribution


> It covers a subset.  It will handle sh2, sh3, sh4 and sh5.  In other
> words, it is not (quite) yet able to replace the existing SH[1-4]
> simulator.
> 
>   Andrew> Secondly, the MIPS, mn10300, d10v and other IGEN simulators support more 
>   Andrew> than one cpu variant (can't use ISA - see binutils list :-/).  How does 
>   Andrew> this simulator go in this regard?
> 
> I'm afraid I'm going to need you to clarify the terminology.  :-(


The mn10300 simulator binary, contains a simulator for both

:model:::mn10300:mn10300:
:model:::am33:am33:


Which simulator to use being selected at run time.  The other two are 
v850 and MIPS (not d10v).   This jells well with GDB which also supports 
  those same architecture variants.

Andrew
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