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arm-sim Fix Thumb BL instruction simulation
- From: Nick Clifton <nickc at cambridge dot redhat dot com>
- To: gdb-patches at sources dot redhat dot com
- Date: 27 May 2002 14:29:59 +0100
- Subject: arm-sim Fix Thumb BL instruction simulation
Hi Guys,
Following the recent fixes for the Thumb BLX instruction I found
that the Thumb's BL instruction was not being simulated correctly
either. So I am applying this patch to fix the problem.
Cheers
Nick
2002-05-27 Nick Clifton <nickc@cambridge.redhat.com>
* thumbemu.c (ARMul_ThumbDecode, Case 31): Do not set LR to pc +
2, it has already been advanced.
Index: thumbemu.c
===================================================================
RCS file: /cvs/src/src/sim/arm/thumbemu.c,v
retrieving revision 1.4
diff -c -3 -p -w -r1.4 thumbemu.c
*** thumbemu.c 23 May 2002 12:38:31 -0000 1.4
--- thumbemu.c 27 May 2002 13:14:40 -0000
*************** tdstate ARMul_ThumbDecode (state, pc, ti
*** 543,549 ****
the simulation of it on its own, with undefined results if
r14 is not suitably initialised. */
{
! ARMword tmp = (pc + 2);
state->Reg[15] = (state->Reg[14] + ((tinstr & 0x07FF) << 1));
state->Reg[14] = (tmp | 1);
valid = t_branch;
--- 544,551 ----
the simulation of it on its own, with undefined results if
r14 is not suitably initialised. */
{
! ARMword tmp = pc;
!
state->Reg[15] = (state->Reg[14] + ((tinstr & 0x07FF) << 1));
state->Reg[14] = (tmp | 1);
valid = t_branch;