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[patch] Fill out `enum sim_d10v_regs'
- From: Andrew Cagney <ac131313 at cygnus dot com>
- To: gdb-patches at sources dot redhat dot com
- Date: Wed, 29 May 2002 20:37:24 -0400
- Subject: [patch] Fill out `enum sim_d10v_regs'
Hello,
The attached fills out the d10v's sim regnum enum to include all
entries, eliminating the ``... = magic number'' and making it a true
enumeration.
I'll commit this in a few days.
Andrew
Index: include/gdb/ChangeLog
2002-05-24 Andrew Cagney <ac131313@redhat.com>
* sim-d10v.h (sim_d10v_regs): Expand to include all registers.
Index: sim/d10v/ChangeLog
2002-05-29 Andrew Cagney <ac131313@redhat.com>
* interp.c (sim_fetch_register, sim_store_register): Use a switch
statement and enums from "sim-d10v.h".
Index: include/gdb/sim-d10v.h
===================================================================
RCS file: /cvs/src/src/include/gdb/sim-d10v.h,v
retrieving revision 1.1
diff -u -r1.1 sim-d10v.h
--- include/gdb/sim-d10v.h 24 May 2002 00:12:18 -0000 1.1
+++ include/gdb/sim-d10v.h 30 May 2002 00:32:21 -0000
@@ -75,26 +75,61 @@
/* The simulator makes use of the following register information. */
+enum sim_d10v_regs
+{
+ SIM_D10V_R0_REGNUM,
+ SIM_D10V_R1_REGNUM,
+ SIM_D10V_R2_REGNUM,
+ SIM_D10V_R3_REGNUM,
+ SIM_D10V_R4_REGNUM,
+ SIM_D10V_R5_REGNUM,
+ SIM_D10V_R6_REGNUM,
+ SIM_D10V_R7_REGNUM,
+ SIM_D10V_R8_REGNUM,
+ SIM_D10V_R9_REGNUM,
+ SIM_D10V_R10_REGNUM,
+ SIM_D10V_R11_REGNUM,
+ SIM_D10V_R12_REGNUM,
+ SIM_D10V_R13_REGNUM,
+ SIM_D10V_R14_REGNUM,
+ SIM_D10V_R15_REGNUM,
+ SIM_D10V_CR0_REGNUM,
+ SIM_D10V_CR1_REGNUM,
+ SIM_D10V_CR2_REGNUM,
+ SIM_D10V_CR3_REGNUM,
+ SIM_D10V_CR4_REGNUM,
+ SIM_D10V_CR5_REGNUM,
+ SIM_D10V_CR6_REGNUM,
+ SIM_D10V_CR7_REGNUM,
+ SIM_D10V_CR8_REGNUM,
+ SIM_D10V_CR9_REGNUM,
+ SIM_D10V_CR10_REGNUM,
+ SIM_D10V_CR11_REGNUM,
+ SIM_D10V_CR12_REGNUM,
+ SIM_D10V_CR13_REGNUM,
+ SIM_D10V_CR14_REGNUM,
+ SIM_D10V_CR15_REGNUM,
+ SIM_D10V_A0_REGNUM,
+ SIM_D10V_A1_REGNUM,
+ SIM_D10V_SPI_REGNUM,
+ SIM_D10V_SPU_REGNUM,
+ SIM_D10V_IMAP0_REGNUM,
+ SIM_D10V_IMAP1_REGNUM,
+ SIM_D10V_DMAP0_REGNUM,
+ SIM_D10V_DMAP1_REGNUM,
+ SIM_D10V_DMAP2_REGNUM,
+ SIM_D10V_DMAP3_REGNUM,
+ SIM_D10V_TS2_DMAP_REGNUM
+};
+
enum
- {
- SIM_D10V_R0_REGNUM = 0,
- SIM_D10V_CR0_REGNUM = 16,
- SIM_D10V_A0_REGNUM = 32,
- SIM_D10V_SPI_REGNUM = 34,
- SIM_D10V_SPU_REGNUM = 35,
- SIM_D10V_IMAP0_REGNUM = 36,
- SIM_D10V_DMAP0_REGNUM = 38,
- SIM_D10V_TS2_DMAP_REGNUM = 40
- };
-
-enum
- {
- SIM_D10V_NR_R_REGS = 16,
- SIM_D10V_NR_A_REGS = 2,
- SIM_D10V_NR_IMAP_REGS = 2,
- SIM_D10V_NR_DMAP_REGS = 4,
- SIM_D10V_NR_CR_REGS = 16
- };
+{
+ SIM_D10V_NR_R_REGS = 16,
+ SIM_D10V_NR_A_REGS = 2,
+ SIM_D10V_NR_IMAP_REGS = 2,
+ SIM_D10V_NR_DMAP_REGS = 4,
+ SIM_D10V_NR_CR_REGS = 16
+};
#ifdef __cplusplus
}
Index: sim/d10v/interp.c
===================================================================
RCS file: /cvs/src/src/sim/d10v/interp.c,v
retrieving revision 1.8
diff -u -r1.8 interp.c
--- sim/d10v/interp.c 28 May 2002 15:49:52 -0000 1.8
+++ sim/d10v/interp.c 30 May 2002 00:32:23 -0000
@@ -1307,54 +1307,82 @@
int length;
{
int size;
- if (rn < 0)
- size = 0;
- else if (rn >= SIM_D10V_R0_REGNUM
- && rn < SIM_D10V_R0_REGNUM + SIM_D10V_NR_R_REGS)
+ switch ((enum gdb_d10v_regs) rn)
{
+ case SIM_D10V_R0_REGNUM:
+ case SIM_D10V_R1_REGNUM:
+ case SIM_D10V_R2_REGNUM:
+ case SIM_D10V_R3_REGNUM:
+ case SIM_D10V_R4_REGNUM:
+ case SIM_D10V_R5_REGNUM:
+ case SIM_D10V_R6_REGNUM:
+ case SIM_D10V_R7_REGNUM:
+ case SIM_D10V_R8_REGNUM:
+ case SIM_D10V_R9_REGNUM:
+ case SIM_D10V_R10_REGNUM:
+ case SIM_D10V_R11_REGNUM:
+ case SIM_D10V_R12_REGNUM:
+ case SIM_D10V_R13_REGNUM:
+ case SIM_D10V_R14_REGNUM:
+ case SIM_D10V_R15_REGNUM:
WRITE_16 (memory, GPR (rn - SIM_D10V_R0_REGNUM));
size = 2;
- }
- else if (rn >= SIM_D10V_CR0_REGNUM
- && rn < SIM_D10V_CR0_REGNUM + SIM_D10V_NR_CR_REGS)
- {
+ break;
+ case SIM_D10V_CR0_REGNUM:
+ case SIM_D10V_CR1_REGNUM:
+ case SIM_D10V_CR2_REGNUM:
+ case SIM_D10V_CR3_REGNUM:
+ case SIM_D10V_CR4_REGNUM:
+ case SIM_D10V_CR5_REGNUM:
+ case SIM_D10V_CR6_REGNUM:
+ case SIM_D10V_CR7_REGNUM:
+ case SIM_D10V_CR8_REGNUM:
+ case SIM_D10V_CR9_REGNUM:
+ case SIM_D10V_CR10_REGNUM:
+ case SIM_D10V_CR11_REGNUM:
+ case SIM_D10V_CR12_REGNUM:
+ case SIM_D10V_CR13_REGNUM:
+ case SIM_D10V_CR14_REGNUM:
+ case SIM_D10V_CR15_REGNUM:
WRITE_16 (memory, CREG (rn - SIM_D10V_CR0_REGNUM));
size = 2;
- }
- else if (rn >= SIM_D10V_A0_REGNUM
- && rn < SIM_D10V_A0_REGNUM + SIM_D10V_NR_A_REGS)
- {
+ break;
+ case SIM_D10V_A0_REGNUM:
+ case SIM_D10V_A1_REGNUM:
WRITE_64 (memory, ACC (rn - SIM_D10V_A0_REGNUM));
size = 8;
- }
- else if (rn == SIM_D10V_SPI_REGNUM)
- {
+ break;
+ case SIM_D10V_SPI_REGNUM:
/* PSW_SM indicates that the current SP is the USER
stack-pointer. */
WRITE_16 (memory, spi_register ());
size = 2;
- }
- else if (rn == SIM_D10V_SPU_REGNUM)
- {
+ break;
+ case SIM_D10V_SPU_REGNUM:
/* PSW_SM indicates that the current SP is the USER
stack-pointer. */
WRITE_16 (memory, spu_register ());
size = 2;
- }
- else if (rn >= SIM_D10V_IMAP0_REGNUM
- && rn < SIM_D10V_IMAP0_REGNUM + SIM_D10V_NR_IMAP_REGS)
- {
+ break;
+ case SIM_D10V_IMAP0_REGNUM:
+ case SIM_D10V_IMAP1_REGNUM:
WRITE_16 (memory, imap_register (rn - SIM_D10V_IMAP0_REGNUM));
size = 2;
- }
- else if (rn >= SIM_D10V_DMAP0_REGNUM
- && rn < SIM_D10V_DMAP0_REGNUM + SIM_D10V_NR_DMAP_REGS)
- {
+ break;
+ case SIM_D10V_DMAP0_REGNUM:
+ case SIM_D10V_DMAP1_REGNUM:
+ case SIM_D10V_DMAP2_REGNUM:
+ case SIM_D10V_DMAP3_REGNUM:
WRITE_16 (memory, dmap_register (rn - SIM_D10V_DMAP0_REGNUM));
size = 2;
+ break;
+ case SIM_D10V_TS2_DMAP_REGNUM:
+ size = 0;
+ break;
+ default:
+ size = 0;
+ break;
}
- else
- size = 0;
return size;
}
@@ -1366,52 +1394,80 @@
int length;
{
int size;
- if (rn < 0)
- size = 0;
- else if (rn >= SIM_D10V_R0_REGNUM
- && rn < SIM_D10V_R0_REGNUM + SIM_D10V_NR_R_REGS)
+ switch ((enum sim_d10v_reg) rn)
{
+ case SIM_D10V_R0_REGNUM:
+ case SIM_D10V_R1_REGNUM:
+ case SIM_D10V_R2_REGNUM:
+ case SIM_D10V_R3_REGNUM:
+ case SIM_D10V_R4_REGNUM:
+ case SIM_D10V_R5_REGNUM:
+ case SIM_D10V_R6_REGNUM:
+ case SIM_D10V_R7_REGNUM:
+ case SIM_D10V_R8_REGNUM:
+ case SIM_D10V_R9_REGNUM:
+ case SIM_D10V_R10_REGNUM:
+ case SIM_D10V_R11_REGNUM:
+ case SIM_D10V_R12_REGNUM:
+ case SIM_D10V_R13_REGNUM:
+ case SIM_D10V_R14_REGNUM:
+ case SIM_D10V_R15_REGNUM:
SET_GPR (rn - SIM_D10V_R0_REGNUM, READ_16 (memory));
size = 2;
- }
- else if (rn >= SIM_D10V_CR0_REGNUM
- && rn < SIM_D10V_CR0_REGNUM + SIM_D10V_NR_CR_REGS)
- {
+ break;
+ case SIM_D10V_CR0_REGNUM:
+ case SIM_D10V_CR1_REGNUM:
+ case SIM_D10V_CR2_REGNUM:
+ case SIM_D10V_CR3_REGNUM:
+ case SIM_D10V_CR4_REGNUM:
+ case SIM_D10V_CR5_REGNUM:
+ case SIM_D10V_CR6_REGNUM:
+ case SIM_D10V_CR7_REGNUM:
+ case SIM_D10V_CR8_REGNUM:
+ case SIM_D10V_CR9_REGNUM:
+ case SIM_D10V_CR10_REGNUM:
+ case SIM_D10V_CR11_REGNUM:
+ case SIM_D10V_CR12_REGNUM:
+ case SIM_D10V_CR13_REGNUM:
+ case SIM_D10V_CR14_REGNUM:
+ case SIM_D10V_CR15_REGNUM:
SET_CREG (rn - SIM_D10V_CR0_REGNUM, READ_16 (memory));
size = 2;
- }
- else if (rn >= SIM_D10V_A0_REGNUM
- && rn < SIM_D10V_A0_REGNUM + SIM_D10V_NR_A_REGS)
- {
+ break;
+ case SIM_D10V_A0_REGNUM:
+ case SIM_D10V_A1_REGNUM:
SET_ACC (rn - SIM_D10V_A0_REGNUM, READ_64 (memory) & MASK40);
size = 8;
- }
- else if (rn == SIM_D10V_SPI_REGNUM)
- {
+ break;
+ case SIM_D10V_SPI_REGNUM:
/* PSW_SM indicates that the current SP is the USER
stack-pointer. */
set_spi_register (READ_16 (memory));
size = 2;
- }
- else if (rn == SIM_D10V_SPU_REGNUM)
- {
+ break;
+ case SIM_D10V_SPU_REGNUM:
set_spu_register (READ_16 (memory));
size = 2;
- }
- else if (rn >= SIM_D10V_IMAP0_REGNUM
- && rn < SIM_D10V_IMAP0_REGNUM + SIM_D10V_NR_IMAP_REGS)
- {
+ break;
+ case SIM_D10V_IMAP0_REGNUM:
+ case SIM_D10V_IMAP1_REGNUM:
set_imap_register (rn - SIM_D10V_IMAP0_REGNUM, READ_16(memory));
size = 2;
- }
- else if (rn >= SIM_D10V_DMAP0_REGNUM
- && rn < SIM_D10V_DMAP0_REGNUM + SIM_D10V_NR_DMAP_REGS)
- {
+ break;
+ case SIM_D10V_DMAP0_REGNUM:
+ case SIM_D10V_DMAP1_REGNUM:
+ case SIM_D10V_DMAP2_REGNUM:
+ case SIM_D10V_DMAP3_REGNUM:
set_dmap_register (rn - SIM_D10V_DMAP0_REGNUM, READ_16(memory));
size = 2;
+ break;
+ case SIM_D10V_TS2_DMAP_REGNUM:
+ size = 0;
+ break;
+ default:
+ size = 0;
+ break;
}
- else
- size = 0;
SLOT_FLUSH ();
return size;
}