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Fixes for v850 simulator


Hi Guys,

  I would like permission to apply the following patch.  It fixes a
  few small problems with the v850 simulator.  The patch was developed
  a while ago, and we have now received permission to contribute it.

Cheers
        Nick

2002-08-28  Catherine Moore  <clm@redhat.com>

	* Makefile.in: Add gen-zero-r0 option.
	* sim-main.h (GPR_SET, GPR_CLEAR): Define.
	* simops.c (OP_24007E0):  Sign extend the imm9
	operand of a mul instruction.

Index: sim/v850/ChangeLog
===================================================================
RCS file: /cvs/src/src/sim/v850/ChangeLog,v
retrieving revision 1.11
diff -c -3 -p -w -r1.11 ChangeLog
*** sim/v850/ChangeLog	17 Jun 2002 21:49:04 -0000	1.11
--- sim/v850/ChangeLog	29 Aug 2002 07:04:47 -0000
***************
*** 1,3 ****
--- 1,10 ----
+ 2002-08-28  Catherine Moore  <clm@redhat.com>
+ 
+ 	* Makefile.in: Add gen-zero-r0 option.
+ 	* sim-main.h (GPR_SET, GPR_CLEAR): Define.
+ 	* simops.c (OP_24007E0):  Sign extend the imm9
+ 	operand of a mul instruction.
+ 
  2002-06-17  Andrew Cagney  <cagney@redhat.com>
  
  	* simops.c (trace_result): Fix printf formatting.
Index: sim/v850/Makefile.in
===================================================================
RCS file: /cvs/src/src/sim/v850/Makefile.in,v
retrieving revision 1.5
diff -c -3 -p -w -r1.5 Makefile.in
*** sim/v850/Makefile.in	2 Dec 2001 19:27:29 -0000	1.5
--- sim/v850/Makefile.in	29 Aug 2002 07:04:47 -0000
*************** tmp-igen: $(IGEN_INSN) $(IGEN_DC) ../ige
*** 82,87 ****
--- 82,88 ----
  	../igen/igen \
  		$(IGEN_TRACE) \
  		-G gen-direct-access \
+ 		-G gen-zero-r0 \
  		-i $(IGEN_INSN) \
  		-o $(IGEN_DC) \
  		-x \
Index: sim/v850/sim-main.h
===================================================================
RCS file: /cvs/src/src/sim/v850/sim-main.h,v
retrieving revision 1.1.1.1
diff -c -3 -p -w -r1.1.1.1 sim-main.h
*** sim/v850/sim-main.h	16 Apr 1999 01:35:12 -0000	1.1.1.1
--- sim/v850/sim-main.h	29 Aug 2002 07:04:47 -0000
*************** do { \
*** 366,371 ****
--- 366,373 ----
  
  #endif
  
+ #define GPR_SET(N, VAL) (State.regs[(N)] = (VAL))
+ #define GPR_CLEAR(N)    (State.regs[(N)] = 0)
  
  extern void divun ( unsigned int       N,
  		    unsigned long int  als,
Index: sim/v850/simops.c
===================================================================
RCS file: /cvs/src/src/sim/v850/simops.c,v
retrieving revision 1.2
diff -c -3 -p -w -r1.2 simops.c
*** sim/v850/simops.c	17 Jun 2002 21:49:05 -0000	1.2
--- sim/v850/simops.c	29 Aug 2002 07:04:47 -0000
*************** OP_24007E0 (void)
*** 2458,2464 ****
  {
    trace_input ("mul", OP_IMM_REG_REG, 0);
  
!   Multiply64 (true, (OP[3] & 0x1f) | ((OP[3] >> 13) & 0x1e0));
  
    trace_output (OP_IMM_REG_REG);
  
--- 2458,2464 ----
  {
    trace_input ("mul", OP_IMM_REG_REG, 0);
  
!   Multiply64 (true, SEXT9 ((OP[3] & 0x1f) | ((OP[3] >> 13) & 0x1e0)));
  
    trace_output (OP_IMM_REG_REG);
  


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