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Re: Unreviewed patches
- From: Kazu Hirata <kazu at cs dot umass dot edu>
- To: msnyder at redhat dot com
- Cc: gdb-patches at sources dot redhat dot com
- Date: Fri, 31 Jan 2003 22:23:29 -0500 (EST)
- Subject: Re: Unreviewed patches
- References: <3E39E145.A5B01D17@redhat.com><20030130.234517.112286807.kazu@cs.umass.edu><3E3B229D.67F2E805@redhat.com>
Hi Michael,
> Yes, thanks. My problem is this: your patch uses a host-order
> sign-extend to simulate a target-order sign-extend. If the host
> and target have different byte orders, you lose. That's probably
> why the simulator uses breg[] to fetch bytes, instead of using
> wreg and masking.
>
> I suggest that it would be comparatively easy to extend the
> breg[] array so that it would cover at least the first three
> bytes in the register (and possibly all four, just because
> it's no extra effort). Something like the attached.
>
> Then the code that references breg[] does not need to change.
I understand your concern. But then if GET_W_REG may give a
byte-swapped value, would the following be endian unsafe?
case O (O_ADD, SW):
rd = GET_W_REG (code->dst.reg);
ea = fetch (&code->src);
res = rd + ea;
goto alu16;
The addition is done in host-order.
Kazu Hirata