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Re: RFA: Add SH2E support
- From: Elena Zannoni <ezannoni at redhat dot com>
- To: Nick Clifton <nickc at redhat dot com>
- Cc: gdb-patches at sources dot redhat dot com
- Date: Sun, 2 Feb 2003 20:11:35 -0500
- Subject: Re: RFA: Add SH2E support
- References: <m3iswf4s7c.fsf@north-pole.nickc.cambridge.redhat.com>
Nick Clifton writes:
> Hi Guys,
>
> I am contributing the SH2E port developed by Red Hat. May apply the
> patch below to update gdb and the simulator please ?
>
> Cheers
> Nick
>
Ok, for gdb. I assume I can approve the simulator as well. So ok.
thanks
elena
> gdb/ChangeLog
> 2003-01-23 Nick Clifton <nickc@redhat.com>
>
> * Add sh2e support:
>
> 2002-04-02 Elena Zannoni <ezannoni@redhat.com>
>
> * gdb/sh-tdep.c (sh_sh2e_register_name): New.
> (sh2e_show_regs): New.
> (sh_gdbarch_init): Handle bfd_mach_sh2e.
> * config/sh/tm-sh.h: Added sh2e to comments.
>
> sim/ChangeLog
> 2003-01-23 Nick Clifton <nickc@redhat.com>
>
> * Add sh2e support:
>
> 2002-04-02 Alexandre Oliva <aoliva@redhat.com>
>
> * sh/gencode.c: Replace sh3e with sh2e except in fsqrt.
>
> Index: gdb/sh-tdep.c
> ===================================================================
> RCS file: /cvs/src/src/gdb/sh-tdep.c,v
> retrieving revision 1.94
> diff -c -3 -p -w -r1.94 sh-tdep.c
> *** gdb/sh-tdep.c 21 Jan 2003 19:43:47 -0000 1.94
> --- gdb/sh-tdep.c 23 Jan 2003 17:16:23 -0000
> *************** sh_sh3e_register_name (int reg_nr)
> *** 157,162 ****
> --- 157,184 ----
> }
>
> static const char *
> + sh_sh2e_register_name (int reg_nr)
> + {
> + static char *register_names[] =
> + {
> + "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
> + "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
> + "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
> + "fpul", "fpscr",
> + "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
> + "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
> + "", "",
> + "", "", "", "", "", "", "", "",
> + "", "", "", "", "", "", "", "",
> + };
> + if (reg_nr < 0)
> + return NULL;
> + if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
> + return NULL;
> + return register_names[reg_nr];
> + }
> +
> + static const char *
> sh_sh_dsp_register_name (int reg_nr)
> {
> static char *register_names[] =
> *************** sh3_show_regs (void)
> *** 2625,2630 ****
> --- 2647,2708 ----
>
>
> static void
> + sh2e_show_regs (void)
> + {
> + printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
> + paddr (read_register (PC_REGNUM)),
> + (long) read_register (SR_REGNUM),
> + (long) read_register (PR_REGNUM),
> + (long) read_register (MACH_REGNUM),
> + (long) read_register (MACL_REGNUM));
> +
> + printf_filtered ("GBR=%08lx VBR=%08lx",
> + (long) read_register (GBR_REGNUM),
> + (long) read_register (VBR_REGNUM));
> + printf_filtered (" FPUL=%08lx FPSCR=%08lx",
> + (long) read_register (gdbarch_tdep (current_gdbarch)->FPUL_REGNUM),
> + (long) read_register (gdbarch_tdep (current_gdbarch)->FPSCR_REGNUM));
> +
> + printf_filtered ("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
> + (long) read_register (0),
> + (long) read_register (1),
> + (long) read_register (2),
> + (long) read_register (3),
> + (long) read_register (4),
> + (long) read_register (5),
> + (long) read_register (6),
> + (long) read_register (7));
> + printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
> + (long) read_register (8),
> + (long) read_register (9),
> + (long) read_register (10),
> + (long) read_register (11),
> + (long) read_register (12),
> + (long) read_register (13),
> + (long) read_register (14),
> + (long) read_register (15));
> +
> + printf_filtered (("FP0-FP7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
> + (long) read_register (FP0_REGNUM + 0),
> + (long) read_register (FP0_REGNUM + 1),
> + (long) read_register (FP0_REGNUM + 2),
> + (long) read_register (FP0_REGNUM + 3),
> + (long) read_register (FP0_REGNUM + 4),
> + (long) read_register (FP0_REGNUM + 5),
> + (long) read_register (FP0_REGNUM + 6),
> + (long) read_register (FP0_REGNUM + 7));
> + printf_filtered (("FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n"),
> + (long) read_register (FP0_REGNUM + 8),
> + (long) read_register (FP0_REGNUM + 9),
> + (long) read_register (FP0_REGNUM + 10),
> + (long) read_register (FP0_REGNUM + 11),
> + (long) read_register (FP0_REGNUM + 12),
> + (long) read_register (FP0_REGNUM + 13),
> + (long) read_register (FP0_REGNUM + 14),
> + (long) read_register (FP0_REGNUM + 15));
> + }
> +
> + static void
> sh3e_show_regs (void)
> {
> struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
> *************** sh_gdbarch_init (struct gdbarch_info inf
> *** 4329,4334 ****
> --- 4407,4426 ----
> set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
> set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
> break;
> + case bfd_mach_sh2e:
> + sh_register_name = sh_sh2e_register_name;
> + sh_show_regs = sh2e_show_regs;
> + sh_store_return_value = sh3e_sh4_store_return_value;
> + sh_register_virtual_type = sh_sh3e_register_virtual_type;
> + set_gdbarch_frame_init_saved_regs (gdbarch, sh_nofp_frame_init_saved_regs);
> + set_gdbarch_register_raw_size (gdbarch, sh_default_register_raw_size);
> + set_gdbarch_register_virtual_size (gdbarch, sh_default_register_raw_size);
> + set_gdbarch_register_byte (gdbarch, sh_default_register_byte);
> + set_gdbarch_fp0_regnum (gdbarch, 25);
> + tdep->FPUL_REGNUM = 23;
> + tdep->FPSCR_REGNUM = 24;
> + tdep->FP_LAST_REGNUM = 40;
> + break;
> case bfd_mach_sh_dsp:
> sh_register_name = sh_sh_dsp_register_name;
> sh_show_regs = sh_dsp_show_regs;
>
> Index: sim/sh/gencode.c
> ===================================================================
> RCS file: /cvs/src/src/sim/sh/gencode.c,v
> retrieving revision 1.4
> diff -c -3 -p -w -r1.4 gencode.c
> *** sim/sh/gencode.c 11 Oct 2002 15:31:28 -0000 1.4
> --- sim/sh/gencode.c 23 Jan 2003 17:16:28 -0000
> *************** op tab[] =
> *** 226,247 ****
> "R[n] = (R[m] & 0xffff);",
> },
>
> ! /* sh3e */
> { "", "", "fabs <FREG_N>", "1111nnnn01011101",
> "FP_UNARY (n, fabs);",
> "/* FIXME: FR(n) &= 0x7fffffff; */",
> },
>
> ! /* sh3e */
> { "", "", "fadd <FREG_M>,<FREG_N>", "1111nnnnmmmm0000",
> "FP_OP (n, +, m);",
> },
>
> ! /* sh3e */
> { "", "", "fcmp/eq <FREG_M>,<FREG_N>", "1111nnnnmmmm0100",
> "FP_CMP (n, ==, m);",
> },
> ! /* sh3e */
> { "", "", "fcmp/gt <FREG_M>,<FREG_N>", "1111nnnnmmmm0101",
> "FP_CMP (n, >, m);",
> },
> --- 226,247 ----
> "R[n] = (R[m] & 0xffff);",
> },
>
> ! /* sh2e */
> { "", "", "fabs <FREG_N>", "1111nnnn01011101",
> "FP_UNARY (n, fabs);",
> "/* FIXME: FR(n) &= 0x7fffffff; */",
> },
>
> ! /* sh2e */
> { "", "", "fadd <FREG_M>,<FREG_N>", "1111nnnnmmmm0000",
> "FP_OP (n, +, m);",
> },
>
> ! /* sh2e */
> { "", "", "fcmp/eq <FREG_M>,<FREG_N>", "1111nnnnmmmm0100",
> "FP_CMP (n, ==, m);",
> },
> ! /* sh2e */
> { "", "", "fcmp/gt <FREG_M>,<FREG_N>", "1111nnnnmmmm0101",
> "FP_CMP (n, >, m);",
> },
> *************** op tab[] =
> *** 278,284 ****
> "}",
> },
>
> ! /* sh3e */
> { "", "", "fdiv <FREG_M>,<FREG_N>", "1111nnnnmmmm0011",
> "FP_OP (n, /, m);",
> "/* FIXME: check for DP and (n & 1) == 0? */",
> --- 278,284 ----
> "}",
> },
>
> ! /* sh2e */
> { "", "", "fdiv <FREG_M>,<FREG_N>", "1111nnnnmmmm0011",
> "FP_OP (n, /, m);",
> "/* FIXME: check for DP and (n & 1) == 0? */",
> *************** op tab[] =
> *** 291,309 ****
> "/* FIXME: check for DP and (n & 1) == 0? */",
> },
>
> ! /* sh3e */
> { "", "", "fldi0 <FREG_N>", "1111nnnn10001101",
> "SET_FR (n, (float)0.0);",
> "/* FIXME: check for DP and (n & 1) == 0? */",
> },
>
> ! /* sh3e */
> { "", "", "fldi1 <FREG_N>", "1111nnnn10011101",
> "SET_FR (n, (float)1.0);",
> "/* FIXME: check for DP and (n & 1) == 0? */",
> },
>
> ! /* sh3e */
> { "", "", "flds <FREG_N>,FPUL", "1111nnnn00011101",
> " union",
> " {",
> --- 291,309 ----
> "/* FIXME: check for DP and (n & 1) == 0? */",
> },
>
> ! /* sh2e */
> { "", "", "fldi0 <FREG_N>", "1111nnnn10001101",
> "SET_FR (n, (float)0.0);",
> "/* FIXME: check for DP and (n & 1) == 0? */",
> },
>
> ! /* sh2e */
> { "", "", "fldi1 <FREG_N>", "1111nnnn10011101",
> "SET_FR (n, (float)1.0);",
> "/* FIXME: check for DP and (n & 1) == 0? */",
> },
>
> ! /* sh2e */
> { "", "", "flds <FREG_N>,FPUL", "1111nnnn00011101",
> " union",
> " {",
> *************** op tab[] =
> *** 314,320 ****
> " FPUL = u.i;",
> },
>
> ! /* sh3e */
> { "", "", "float FPUL,<FREG_N>", "1111nnnn00101101",
> /* sh4 */
> "if (FPSCR_PR)",
> --- 314,320 ----
> " FPUL = u.i;",
> },
>
> ! /* sh2e */
> { "", "", "float FPUL,<FREG_N>", "1111nnnn00101101",
> /* sh4 */
> "if (FPSCR_PR)",
> *************** op tab[] =
> *** 325,337 ****
> "}",
> },
>
> ! /* sh3e */
> { "", "", "fmac <FREG_0>,<FREG_M>,<FREG_N>", "1111nnnnmmmm1110",
> "SET_FR (n, FR(m) * FR(0) + FR(n));",
> "/* FIXME: check for DP and (n & 1) == 0? */",
> },
>
> ! /* sh3e */
> { "", "", "fmov <FREG_M>,<FREG_N>", "1111nnnnmmmm1100",
> /* sh4 */
> "if (FPSCR_SZ) {",
> --- 325,337 ----
> "}",
> },
>
> ! /* sh2e */
> { "", "", "fmac <FREG_0>,<FREG_M>,<FREG_N>", "1111nnnnmmmm1110",
> "SET_FR (n, FR(m) * FR(0) + FR(n));",
> "/* FIXME: check for DP and (n & 1) == 0? */",
> },
>
> ! /* sh2e */
> { "", "", "fmov <FREG_M>,<FREG_N>", "1111nnnnmmmm1100",
> /* sh4 */
> "if (FPSCR_SZ) {",
> *************** op tab[] =
> *** 345,351 ****
> " SET_FR (n, FR (m));",
> "}",
> },
> ! /* sh3e */
> { "", "", "fmov.s <FREG_M>,@<REG_N>", "1111nnnnmmmm1010",
> /* sh4 */
> "if (FPSCR_SZ) {",
> --- 345,351 ----
> " SET_FR (n, FR (m));",
> "}",
> },
> ! /* sh2e */
> { "", "", "fmov.s <FREG_M>,@<REG_N>", "1111nnnnmmmm1010",
> /* sh4 */
> "if (FPSCR_SZ) {",
> *************** op tab[] =
> *** 358,364 ****
> " WLAT (R[n], FI(m));",
> "}",
> },
> ! /* sh3e */
> { "", "", "fmov.s @<REG_M>,<FREG_N>", "1111nnnnmmmm1000",
> /* sh4 */
> "if (FPSCR_SZ) {",
> --- 358,364 ----
> " WLAT (R[n], FI(m));",
> "}",
> },
> ! /* sh2e */
> { "", "", "fmov.s @<REG_M>,<FREG_N>", "1111nnnnmmmm1000",
> /* sh4 */
> "if (FPSCR_SZ) {",
> *************** op tab[] =
> *** 371,377 ****
> " SET_FI(n, RLAT(R[m]));",
> "}",
> },
> ! /* sh3e */
> { "", "", "fmov.s @<REG_M>+,<FREG_N>", "1111nnnnmmmm1001",
> /* sh4 */
> "if (FPSCR_SZ) {",
> --- 371,377 ----
> " SET_FI(n, RLAT(R[m]));",
> "}",
> },
> ! /* sh2e */
> { "", "", "fmov.s @<REG_M>+,<FREG_N>", "1111nnnnmmmm1001",
> /* sh4 */
> "if (FPSCR_SZ) {",
> *************** op tab[] =
> *** 386,392 ****
> " R[m] += 4;",
> "}",
> },
> ! /* sh3e */
> { "", "", "fmov.s <FREG_M>,@-<REG_N>", "1111nnnnmmmm1011",
> /* sh4 */
> "if (FPSCR_SZ) {",
> --- 386,392 ----
> " R[m] += 4;",
> "}",
> },
> ! /* sh2e */
> { "", "", "fmov.s <FREG_M>,@-<REG_N>", "1111nnnnmmmm1011",
> /* sh4 */
> "if (FPSCR_SZ) {",
> *************** op tab[] =
> *** 401,407 ****
> " WLAT (R[n], FI(m));",
> "}",
> },
> ! /* sh3e */
> { "", "", "fmov.s @(R0,<REG_M>),<FREG_N>", "1111nnnnmmmm0110",
> /* sh4 */
> "if (FPSCR_SZ) {",
> --- 401,407 ----
> " WLAT (R[n], FI(m));",
> "}",
> },
> ! /* sh2e */
> { "", "", "fmov.s @(R0,<REG_M>),<FREG_N>", "1111nnnnmmmm0110",
> /* sh4 */
> "if (FPSCR_SZ) {",
> *************** op tab[] =
> *** 414,420 ****
> " SET_FI(n, RLAT(R[0] + R[m]));",
> "}",
> },
> ! /* sh3e */
> { "", "", "fmov.s <FREG_M>,@(R0,<REG_N>)", "1111nnnnmmmm0111",
> /* sh4 */
> "if (FPSCR_SZ) {",
> --- 414,420 ----
> " SET_FI(n, RLAT(R[0] + R[m]));",
> "}",
> },
> ! /* sh2e */
> { "", "", "fmov.s <FREG_M>,@(R0,<REG_N>)", "1111nnnnmmmm0111",
> /* sh4 */
> "if (FPSCR_SZ) {",
> *************** op tab[] =
> *** 430,441 ****
>
> /* sh4: See fmov instructions above for move to/from extended fp registers */
>
> ! /* sh3e */
> { "", "", "fmul <FREG_M>,<FREG_N>", "1111nnnnmmmm0010",
> "FP_OP(n, *, m);",
> },
>
> ! /* sh3e */
> { "", "", "fneg <FREG_N>", "1111nnnn01001101",
> "FP_UNARY(n, -);",
> },
> --- 430,441 ----
>
> /* sh4: See fmov instructions above for move to/from extended fp registers */
>
> ! /* sh2e */
> { "", "", "fmul <FREG_M>,<FREG_N>", "1111nnnnmmmm0010",
> "FP_OP(n, *, m);",
> },
>
> ! /* sh2e */
> { "", "", "fneg <FREG_N>", "1111nnnn01001101",
> "FP_UNARY(n, -);",
> },
> *************** op tab[] =
> *** 455,466 ****
> "FP_UNARY(n, sqrt);",
> },
>
> ! /* sh3e */
> { "", "", "fsub <FREG_M>,<FREG_N>", "1111nnnnmmmm0001",
> "FP_OP(n, -, m);",
> },
>
> ! /* sh3e */
> { "", "", "ftrc <FREG_N>, FPUL", "1111nnnn00111101",
> /* sh4 */
> "if (FPSCR_PR) {",
> --- 455,466 ----
> "FP_UNARY(n, sqrt);",
> },
>
> ! /* sh2e */
> { "", "", "fsub <FREG_M>,<FREG_N>", "1111nnnnmmmm0001",
> "FP_OP(n, -, m);",
> },
>
> ! /* sh2e */
> { "", "", "ftrc <FREG_N>, FPUL", "1111nnnn00111101",
> /* sh4 */
> "if (FPSCR_PR) {",
> *************** op tab[] =
> *** 476,482 ****
> " FPUL = (int)FR(n);",
> },
>
> ! /* sh3e */
> { "", "", "fsts FPUL,<FREG_N>", "1111nnnn00001101",
> " union",
> " {",
> --- 476,482 ----
> " FPUL = (int)FR(n);",
> },
>
> ! /* sh2e */
> { "", "", "fsts FPUL,<FREG_N>", "1111nnnn00001101",
> " union",
> " {",
> *************** op tab[] =
> *** 561,571 ****
> "SREG (m) = RLAT(R[n]);",
> "R[n] += 4;",
> },
> ! /* sh3e / sh-dsp (lds <REG_N>,DSR) */
> { "", "n", "lds <REG_N>,FPSCR", "0100nnnn01101010",
> "SET_FPSCR(R[n]);",
> },
> ! /* sh3e / sh-dsp (lds.l @<REG_N>+,DSR) */
> { "", "n", "lds.l @<REG_N>+,FPSCR", "0100nnnn01100110",
> "MA (1);",
> "SET_FPSCR (RLAT(R[n]));",
> --- 561,571 ----
> "SREG (m) = RLAT(R[n]);",
> "R[n] += 4;",
> },
> ! /* sh2e / sh-dsp (lds <REG_N>,DSR) */
> { "", "n", "lds <REG_N>,FPSCR", "0100nnnn01101010",
> "SET_FPSCR(R[n]);",
> },
> ! /* sh2e / sh-dsp (lds.l @<REG_N>+,DSR) */
> { "", "n", "lds.l @<REG_N>+,FPSCR", "0100nnnn01100110",
> "MA (1);",
> "SET_FPSCR (RLAT(R[n]));",