This is the mail archive of the
gdb-patches@sources.redhat.com
mailing list for the GDB project.
[PATCH] More obvious fixes in sim/sh/gencode.c
- From: Michael Snyder <msnyder at redhat dot com>
- To: Joern Rennecke <joern dot rennecke at superh dot com>
- Cc: gdb-patches at sources dot redhat dot com
- Date: Tue, 27 Jan 2004 15:31:35 -0800
- Subject: [PATCH] More obvious fixes in sim/sh/gencode.c
- Organization: Red Hat, Inc.
Separated from whitespace patch.
2004-01-27 Michael Snyder <msnyder@redhat.com>
* gencode.c (op tab): Some refs and defs fixes.
"fsrra" -> "fsrra <FREG_N>".
"sleep": replace array ref with array addr.
"trapa": ditto.
Index: gencode.c
===================================================================
RCS file: /cvs/src/src/sim/sh/gencode.c,v
retrieving revision 1.24
diff -p -r1.24 gencode.c
*** gencode.c 10 Jan 2004 00:43:28 -0000 1.24
--- gencode.c 27 Jan 2004 23:12:44 -0000
*************** typedef
struct *** 48,54 ****
op tab[] =
{
! { "n", "", "add #<imm>,<REG_N>", "0111nnnni8*1....",
"R[n] += SEXT (i);",
"if (i == 0) {",
" UNDEF(n); /* see #ifdef PARANOID */",
--- 48,54 ----
op tab[] =
{
! { "n", "n", "add #<imm>,<REG_N>", "0111nnnni8*1....",
"R[n] += SEXT (i);",
"if (i == 0) {",
" UNDEF(n); /* see #ifdef PARANOID */",
*************** op tab[] =
*** 72,78 ****
"R[n] = ult;",
},
! { "0", "", "and #<imm>,R0", "11001001i8*1....",
"R0 &= i;",
},
{ "n", "nm", "and <REG_M>,<REG_N>", "0010nnnnmmmm1001",
--- 72,78 ----
"R[n] = ult;",
},
! { "0", "0", "and #<imm>,R0", "11001001i8*1....",
"R0 &= i;",
},
{ "n", "nm", "and <REG_M>,<REG_N>", "0010nnnnmmmm1001",
*************** op tab[] =
*** 201,208 ****
"SET_SR_T (0);",
},
! { "", "nm", "div1 <REG_M>,<REG_N>", "0011nnnnmmmm0100",
! "div1 (R, m, n/*, T*/);",
},
{ "", "nm", "dmuls.l <REG_M>,<REG_N>", "0011nnnnmmmm1101",
--- 201,208 ----
"SET_SR_T (0);",
},
! { "n", "nm", "div1 <REG_M>,<REG_N>", "0011nnnnmmmm0100",
! "div1 (&R0, m, n/*, T*/);",
},
{ "", "nm", "dmuls.l <REG_M>,<REG_N>", "0011nnnnmmmm1101",
*************** op tab[] =
*** 490,496 ****
},
/* sh4 */
! { "", "", "fsrra", "1111nnnn01111101",
"if (FPSCR_PR)",
" RAISE_EXCEPTION (SIGILL);",
"else",
--- 491,497 ----
},
/* sh4 */
! { "", "", "fsrra <FREG_N>", "1111nnnn01111101",
"if (FPSCR_PR)",
" RAISE_EXCEPTION (SIGILL);",
"else",
*************** op tab[] =
*** 840,846 ****
"WLAT (R[n], R[0]);",
},
! { "n", "0", "movco.l R0, @<REG_N>", "0000nnnn01110011",
"/* LDST -> T */",
"SET_SR_T (LDST);",
"/* if (T) R0 -> (Rn) */",
--- 841,847 ----
"WLAT (R[n], R[0]);",
},
! { "", "n0", "movco.l R0, @<REG_N>", "0000nnnn01110011",
"/* LDST -> T */",
"SET_SR_T (LDST);",
"/* if (T) R0 -> (Rn) */",
*************** op tab[] =
*** 1101,1107 ****
},
{ "", "", "sleep", "0000000000011011",
! "nip += trap (0xc3, R0, PC, memory, maskl, maskw, endianw);",
},
{ "n", "", "stc <CREG_M>,<REG_N>", "0000nnnnmmmm0010",
--- 1102,1108 ----
},
{ "", "", "sleep", "0000000000011011",
! "nip += trap (0xc3, &R0, PC, memory, maskl, maskw, endianw);",
},
{ "n", "", "stc <CREG_M>,<REG_N>", "0000nnnnmmmm0010",
*************** op tab[] =
*** 1192,1198 ****
{ "0", "", "trapa #<imm>", "11000011i8*1....",
"long imm = 0xff & i;",
"if (i < 20 || i == 33 || i == 34 || i == 0xc3)",
! " nip += trap (i, R, PC, memory, maskl, maskw,endianw);",
#if 0
"else {",
/* SH-[12] */
--- 1193,1199 ----
{ "0", "", "trapa #<imm>", "11000011i8*1....",
"long imm = 0xff & i;",
"if (i < 20 || i == 33 || i == 34 || i == 0xc3)",
! " nip += trap (i, &R0, PC, memory, maskl, maskw, endianw);",
#if 0
"else {",
/* SH-[12] */