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Patch to fix simulation of the FR405 scutss instruction
- From: Richard Sandiford <rsandifo at redhat dot com>
- To: gdb-patches at sources dot redhat dot com
- Cc: brolley at redhat dot com
- Date: Thu, 26 Feb 2004 09:16:26 +0000
- Subject: Patch to fix simulation of the FR405 scutss instruction
This patch adds some missing rounding to the handling of the FR405
scutss instruction. It also fixes the test case (which assumed the old
behaviour) and adds examples from the FR400 instruction set manual.
Tested against the sim testsuite. OK to install?
Richard
Note: like a lot of this file, the old code assumed that signed right
shifts are done arithmetically. I've continued to use that idiom here
on the basis that, if it ever becomes a problem, the whole file should
be fixed.
sim/frv/
* frv.c (frvbf_iacc_cut): Rework, taking rounding into account.
sim/testsuite/
* sim/frv/fr400/scutss.cgs: Fix tests to account for rounding.
Add some new ones.
Index: sim/frv/frv.c
===================================================================
RCS file: /cvs/src/src/sim/frv/frv.c,v
retrieving revision 1.5
diff -c -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.5 frv.c
*** sim/frv/frv.c 24 Nov 2003 16:45:03 -0000 1.5
--- sim/frv/frv.c 16 Jan 2004 13:54:05 -0000
***************
*** 1,5 ****
/* frv simulator support code
! Copyright (C) 1998, 1999, 2000, 2001, 2003 Free Software Foundation, Inc.
Contributed by Red Hat.
This file is part of the GNU simulators.
--- 1,6 ----
/* frv simulator support code
! Copyright (C) 1998, 1999, 2000, 2001, 2003, 2004 Free Software
! Foundation, Inc.
Contributed by Red Hat.
This file is part of the GNU simulators.
*************** frvbf_media_cut_ss (SIM_CPU *current_cpu
*** 1100,1124 ****
SI
frvbf_iacc_cut (SIM_CPU *current_cpu, DI acc, SI cut_point)
{
! /* The cut point is the lower 6 bits (signed) of what we are passed. */
cut_point = cut_point << 25 >> 25;
! if (cut_point <= -32)
! cut_point = -31; /* Special case for full shiftout. */
! /* Negative cuts (cannot saturate). */
if (cut_point < 0)
! return acc >> (32 + -cut_point);
! /* Positive cuts will saturate if significant bits are shifted out. */
! if (acc != ((acc << cut_point) >> cut_point))
! if (acc >= 0)
! return 0x7fffffff;
! else
! return 0x80000000;
! /* No saturate, just cut. */
! return ((acc << cut_point) >> 32);
}
/* Compute the result of shift-left-arithmetic-with-saturation (SLASS). */
--- 1101,1153 ----
SI
frvbf_iacc_cut (SIM_CPU *current_cpu, DI acc, SI cut_point)
{
! DI lower, upper;
!
! /* The cut point is the lower 7 bits (signed) of what we are passed. */
cut_point = cut_point << 25 >> 25;
! /* Conceptually, the operation is on a 128-bit sign-extension of ACC.
! The top bit of the return value corresponds to bit (63 - CUT_POINT)
! of this 128-bit value.
! Since we can't deal with 128-bit values very easily, convert the
! operation into an equivalent 64-bit one. */
if (cut_point < 0)
! {
! /* Avoid an undefined shift operation. */
! if (cut_point == -64)
! acc >>= 63;
! else
! acc >>= -cut_point;
! cut_point = 0;
! }
! /* Get the shifted but unsaturated result. Set LOWER to the lowest
! 32 bits of the result and UPPER to the result >> 31. */
! if (cut_point < 32)
! {
! /* The cut loses the (32 - CUT_POINT) least significant bits.
! Round the result up if the most significant of these lost bits
! is 1. */
! lower = acc >> (32 - cut_point);
! if (lower < 0x7fffffff)
! if (acc & LSBIT64 (32 - cut_point - 1))
! lower++;
! upper = lower >> 31;
! }
! else
! {
! lower = acc << (cut_point - 32);
! upper = acc >> (63 - cut_point);
! }
! /* Saturate the result. */
! if (upper < -1)
! return ~0x7fffffff;
! else if (upper > 0)
! return 0x7fffffff;
! else
! return lower;
}
/* Compute the result of shift-left-arithmetic-with-saturation (SLASS). */
Index: sim/testsuite/sim/frv/fr400/scutss.cgs
===================================================================
RCS file: /cvs/src/src/sim/testsuite/sim/frv/fr400/scutss.cgs,v
retrieving revision 1.1
diff -u -p -F^\([(a-zA-Z0-9_]\|#define\) -r1.1 scutss.cgs
--- sim/testsuite/sim/frv/fr400/scutss.cgs 8 Oct 2003 18:21:01 -0000 1.1
+++ sim/testsuite/sim/frv/fr400/scutss.cgs 16 Jan 2004 13:54:09 -0000
@@ -12,7 +12,7 @@ scutss:
set_gr_immed 0,gr10
scutss gr10,gr11
- test_gr_limmed 0xffff,0xffe7,gr11
+ test_gr_limmed 0xffff,0xffe8,gr11
set_gr_immed 1,gr10
scutss gr10,gr11
@@ -28,7 +28,7 @@ scutss:
set_gr_immed 4,gr10
scutss gr10,gr11
- test_gr_limmed 0xffff,0xfe78,gr11
+ test_gr_limmed 0xffff,0xfe79,gr11
set_gr_immed 5,gr10
scutss gr10,gr11
@@ -40,11 +40,11 @@ scutss:
set_gr_immed 7,gr10
scutss gr10,gr11
- test_gr_limmed 0xffff,0xf3c4,gr11
+ test_gr_limmed 0xffff,0xf3c5,gr11
set_gr_immed 8,gr10
scutss gr10,gr11
- test_gr_limmed 0xffff,0xe789,gr11
+ test_gr_limmed 0xffff,0xe78a,gr11
set_gr_immed 9,gr10
scutss gr10,gr11
@@ -52,7 +52,7 @@ scutss:
set_gr_immed 10,gr10
scutss gr10,gr11
- test_gr_limmed 0xffff,0x9e26,gr11
+ test_gr_limmed 0xffff,0x9e27,gr11
set_gr_immed 11,gr10
scutss gr10,gr11
@@ -60,7 +60,7 @@ scutss:
set_gr_immed 12,gr10
scutss gr10,gr11
- test_gr_limmed 0xfffe,0x789a,gr11
+ test_gr_limmed 0xfffe,0x789b,gr11
set_gr_immed 13,gr10
scutss gr10,gr11
@@ -68,19 +68,19 @@ scutss:
set_gr_immed 14,gr10
scutss gr10,gr11
- test_gr_limmed 0xfff9,0xe26a,gr11
+ test_gr_limmed 0xfff9,0xe26b,gr11
set_gr_immed 15,gr10
scutss gr10,gr11
- test_gr_limmed 0xfff3,0xc4d5,gr11
+ test_gr_limmed 0xfff3,0xc4d6,gr11
set_gr_immed 16,gr10
scutss gr10,gr11
- test_gr_limmed 0xffe7,0x89ab,gr11
+ test_gr_limmed 0xffe7,0x89ac,gr11
set_gr_immed 17,gr10
scutss gr10,gr11
- test_gr_limmed 0xffcf,0x1357,gr11
+ test_gr_limmed 0xffcf,0x1358,gr11
set_gr_immed 18,gr10
scutss gr10,gr11
@@ -92,11 +92,11 @@ scutss:
set_gr_immed 20,gr10
scutss gr10,gr11
- test_gr_limmed 0xfe78,0x9abc,gr11
+ test_gr_limmed 0xfe78,0x9abd,gr11
set_gr_immed 21,gr10
scutss gr10,gr11
- test_gr_limmed 0xfcf1,0x3579,gr11
+ test_gr_limmed 0xfcf1,0x357a,gr11
set_gr_immed 22,gr10
scutss gr10,gr11
@@ -104,19 +104,19 @@ scutss:
set_gr_immed 23,gr10
scutss gr10,gr11
- test_gr_limmed 0xf3c4,0xd5e6,gr11
+ test_gr_limmed 0xf3c4,0xd5e7,gr11
set_gr_immed 24,gr10
scutss gr10,gr11
- test_gr_limmed 0xe789,0xabcd,gr11
+ test_gr_limmed 0xe789,0xabce,gr11
set_gr_immed 25,gr10
scutss gr10,gr11
- test_gr_limmed 0xcf13,0x579b,gr11
+ test_gr_limmed 0xcf13,0x579c,gr11
set_gr_immed 26,gr10
scutss gr10,gr11
- test_gr_limmed 0x9e26,0xaf37,gr11
+ test_gr_limmed 0x9e26,0xaf38,gr11
set_gr_immed 27,gr10
scutss gr10,gr11
@@ -268,11 +268,11 @@ scutss:
set_gr_immed 64,gr10 ; same as -64
scutss gr10,gr11
- test_gr_immed -1,gr11
+ test_gr_immed 0,gr11
set_gr_immed 128,gr10 ; same as 0
scutss gr10,gr11
- test_gr_limmed 0xffff,0xffe7,gr11
+ test_gr_limmed 0xffff,0xffe8,gr11
.global scutss2
scutss2:
@@ -281,7 +281,7 @@ scutss2:
set_gr_limmed 0xffff,0xffff,gr10 ; -1
scutss gr10,gr11
- test_gr_limmed 0xf3c4,0xd5e6,gr11
+ test_gr_limmed 0xf3c4,0xd5e7,gr11
set_gr_limmed 0x0000,0x007e,gr10 ; -2 (only lower 7 bits matter)
scutss gr10,gr11
@@ -289,11 +289,11 @@ scutss2:
set_gr_immed -3,gr10
scutss gr10,gr11
- test_gr_limmed 0xfcf1,0x3579,gr11
+ test_gr_limmed 0xfcf1,0x357a,gr11
set_gr_immed -4,gr10
scutss gr10,gr11
- test_gr_limmed 0xfe78,0x9abc,gr11
+ test_gr_limmed 0xfe78,0x9abd,gr11
set_gr_immed -5,gr10
scutss gr10,gr11
@@ -305,19 +305,19 @@ scutss2:
set_gr_immed -7,gr10
scutss gr10,gr11
- test_gr_limmed 0xffcf,0x1357,gr11
+ test_gr_limmed 0xffcf,0x1358,gr11
set_gr_immed -8,gr10
scutss gr10,gr11
- test_gr_limmed 0xffe7,0x89ab,gr11
+ test_gr_limmed 0xffe7,0x89ac,gr11
set_gr_immed -9,gr10
scutss gr10,gr11
- test_gr_limmed 0xfff3,0xc4d5,gr11
+ test_gr_limmed 0xfff3,0xc4d6,gr11
set_gr_immed -10,gr10
scutss gr10,gr11
- test_gr_limmed 0xfff9,0xe26a,gr11
+ test_gr_limmed 0xfff9,0xe26b,gr11
set_gr_immed -11,gr10
scutss gr10,gr11
@@ -325,7 +325,7 @@ scutss2:
set_gr_immed -12,gr10
scutss gr10,gr11
- test_gr_limmed 0xfffe,0x789a,gr11
+ test_gr_limmed 0xfffe,0x789b,gr11
set_gr_immed -13,gr10
scutss gr10,gr11
@@ -333,7 +333,7 @@ scutss2:
set_gr_immed -14,gr10
scutss gr10,gr11
- test_gr_limmed 0xffff,0x9e26,gr11
+ test_gr_limmed 0xffff,0x9e27,gr11
set_gr_immed -15,gr10
scutss gr10,gr11
@@ -341,11 +341,11 @@ scutss2:
set_gr_immed -16,gr10
scutss gr10,gr11
- test_gr_limmed 0xffff,0xe789,gr11
+ test_gr_limmed 0xffff,0xe78a,gr11
set_gr_immed -17,gr10
scutss gr10,gr11
- test_gr_limmed 0xffff,0xf3c4,gr11
+ test_gr_limmed 0xffff,0xf3c5,gr11
set_gr_immed -18,gr10
scutss gr10,gr11
@@ -357,7 +357,7 @@ scutss2:
set_gr_immed -20,gr10
scutss gr10,gr11
- test_gr_limmed 0xffff,0xfe78,gr11
+ test_gr_limmed 0xffff,0xfe79,gr11
set_gr_immed -21,gr10
scutss gr10,gr11
@@ -373,19 +373,19 @@ scutss2:
set_gr_immed -24,gr10
scutss gr10,gr11
- test_gr_limmed 0xffff,0xffe7,gr11
+ test_gr_limmed 0xffff,0xffe8,gr11
set_gr_immed -25,gr10
scutss gr10,gr11
- test_gr_limmed 0xffff,0xfff3,gr11
+ test_gr_limmed 0xffff,0xfff4,gr11
set_gr_immed -26,gr10
scutss gr10,gr11
- test_gr_limmed 0xffff,0xfff9,gr11
+ test_gr_limmed 0xffff,0xfffa,gr11
set_gr_immed -27,gr10
scutss gr10,gr11
- test_gr_limmed 0xffff,0xfffc,gr11
+ test_gr_limmed 0xffff,0xfffd,gr11
set_gr_immed -28,gr10
scutss gr10,gr11
@@ -397,26 +397,26 @@ scutss2:
set_gr_immed -30,gr10
scutss gr10,gr11
- test_gr_limmed 0xffff,0xffff,gr11
+ test_gr_immed 0,gr11
set_gr_immed -31,gr10
scutss gr10,gr11
- test_gr_limmed 0xffff,0xffff,gr11
+ test_gr_immed 0,gr11
set_gr_immed -32,gr10
scutss gr10,gr11
- test_gr_limmed 0xffff,0xffff,gr11
+ test_gr_immed 0,gr11
set_gr_limmed 0,64,gr10 ; same as -32
scutss gr10,gr11
- test_gr_limmed 0xffff,0xffff,gr11
+ test_gr_immed 0,gr11
set_spr_immed 0x6789abcd,iacc0h
set_spr_immed 0xefa5a5a5,iacc0l
set_gr_limmed 0xffff,0xffff,gr10
scutss gr10,gr11
- test_gr_limmed 0x33c4,0xd5e6,gr11
+ test_gr_limmed 0x33c4,0xd5e7,gr11
set_gr_limmed 0x0000,0x007e,gr10 ; -2 (only lower 7 bits matter)
scutss gr10,gr11
@@ -424,11 +424,11 @@ scutss2:
set_gr_immed -3,gr10
scutss gr10,gr11
- test_gr_limmed 0x0cf1,0x3579,gr11
+ test_gr_limmed 0x0cf1,0x357a,gr11
set_gr_immed -4,gr10
scutss gr10,gr11
- test_gr_limmed 0x0678,0x9abc,gr11
+ test_gr_limmed 0x0678,0x9abd,gr11
set_gr_immed -5,gr10
scutss gr10,gr11
@@ -440,19 +440,19 @@ scutss2:
set_gr_immed -7,gr10
scutss gr10,gr11
- test_gr_limmed 0x00cf,0x1357,gr11
+ test_gr_limmed 0x00cf,0x1358,gr11
set_gr_immed -8,gr10
scutss gr10,gr11
- test_gr_limmed 0x0067,0x89ab,gr11
+ test_gr_limmed 0x0067,0x89ac,gr11
set_gr_immed -9,gr10
scutss gr10,gr11
- test_gr_limmed 0x0033,0xc4d5,gr11
+ test_gr_limmed 0x0033,0xc4d6,gr11
set_gr_immed -10,gr10
scutss gr10,gr11
- test_gr_limmed 0x0019,0xe26a,gr11
+ test_gr_limmed 0x0019,0xe26b,gr11
set_gr_immed -11,gr10
scutss gr10,gr11
@@ -460,7 +460,7 @@ scutss2:
set_gr_immed -12,gr10
scutss gr10,gr11
- test_gr_limmed 0x0006,0x789a,gr11
+ test_gr_limmed 0x0006,0x789b,gr11
set_gr_immed -13,gr10
scutss gr10,gr11
@@ -468,7 +468,7 @@ scutss2:
set_gr_immed -14,gr10
scutss gr10,gr11
- test_gr_limmed 0x0001,0x9e26,gr11
+ test_gr_limmed 0x0001,0x9e27,gr11
set_gr_immed -15,gr10
scutss gr10,gr11
@@ -476,11 +476,11 @@ scutss2:
set_gr_immed -16,gr10
scutss gr10,gr11
- test_gr_limmed 0x0000,0x6789,gr11
+ test_gr_limmed 0x0000,0x678a,gr11
set_gr_immed -17,gr10
scutss gr10,gr11
- test_gr_limmed 0x0000,0x33c4,gr11
+ test_gr_limmed 0x0000,0x33c5,gr11
set_gr_immed -18,gr10
scutss gr10,gr11
@@ -492,7 +492,7 @@ scutss2:
set_gr_immed -20,gr10
scutss gr10,gr11
- test_gr_limmed 0x0000,0x0678,gr11
+ test_gr_limmed 0x0000,0x0679,gr11
set_gr_immed -21,gr10
scutss gr10,gr11
@@ -508,19 +508,19 @@ scutss2:
set_gr_immed -24,gr10
scutss gr10,gr11
- test_gr_limmed 0x0000,0x0067,gr11
+ test_gr_limmed 0x0000,0x0068,gr11
set_gr_immed -25,gr10
scutss gr10,gr11
- test_gr_limmed 0x0000,0x0033,gr11
+ test_gr_limmed 0x0000,0x0034,gr11
set_gr_immed -26,gr10
scutss gr10,gr11
- test_gr_limmed 0x0000,0x0019,gr11
+ test_gr_limmed 0x0000,0x001a,gr11
set_gr_immed -27,gr10
scutss gr10,gr11
- test_gr_limmed 0x0000,0x000c,gr11
+ test_gr_limmed 0x0000,0x000d,gr11
set_gr_immed -28,gr10
scutss gr10,gr11
@@ -532,11 +532,11 @@ scutss2:
set_gr_immed -30,gr10
scutss gr10,gr11
- test_gr_limmed 0x0000,0x0001,gr11
+ test_gr_limmed 0x0000,0x0002,gr11
set_gr_immed -31,gr10
scutss gr10,gr11
- test_gr_limmed 0x0000,0x0000,gr11
+ test_gr_limmed 0x0000,0x0001,gr11
set_gr_immed -32,gr10
scutss gr10,gr11
@@ -630,13 +630,35 @@ scutss2:
set_gr_limmed 0xffff,0xfffc,gr10
scutss gr10,gr11
- test_gr_limmed 0xfaf5,0xa5a5,gr11
+ test_gr_limmed 0xfaf5,0xa5a6,gr11
set_spr_immed 0x2f5a5a5a,iacc0h
set_spr_immed 0x5a5a5a5a,iacc0l
set_gr_limmed 0xffff,0xfff9,gr10
scutss gr10,gr11
- test_gr_limmed 0x005e,0xb4b4,gr11
+ test_gr_limmed 0x005e,0xb4b5,gr11
+
+# From the manual
+ .global scutss3
+scutss3:
+ set_spr_immed 0xfffffedc,iacc0h
+ set_spr_immed 0xba987654,iacc0l
+
+ set_gr_immed 16,gr10
+ scutss gr10,gr11
+ test_gr_limmed 0xfedc,0xba98,gr11
+
+ set_gr_immed 12,gr10
+ scutss gr10,gr11
+ test_gr_limmed 0xffed,0xcbaa,gr11
+
+ set_gr_immed -4,gr10
+ scutss gr10,gr11
+ test_gr_limmed 0xffff,0xffee,gr11
+
+ set_gr_immed 24,gr10
+ scutss gr10,gr11
+ test_gr_limmed 0x8000,0x0000,gr11
pass