This is the mail archive of the gdb-patches@sources.redhat.com mailing list for the GDB project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: [rfa/amd64] Zero fill 32-bit registers


   Date: Thu, 26 Feb 2004 20:22:11 -0500
   From: Andrew Cagney <ac131313@redhat.com>

Hello,

For a 64-bit gregset, the code was only modifying the low 32-bits of the register field - leaving the upper 64-bits undefined.

That's not completely unintentional.  The idea is to leave any
"reserved" bits untouched, and in a sense for 32-bit stuff the upper
32 bits are "reserved"; they are not necessarily zero, at least not
for all registers.

Er, the upper 32-bits here aren't reserved. The request was for a 64-bit register, and this code is erreneously only supplying half that value - that leaves the upper 32-bits undefined.


We've hit the same problem in the past with the MIPS. When only 32-bits were available the value was expanded (in accordance with the ISA) to the full 64-bits.

I guess the thread code isn't doing the equivalent of the PT_GETREGS
call.  I think the correct way to fix this is to make sure the buffer
is properly initialized before you pass it to
amd64_collect_native_gregset.

Don't look at me, the buffer originated in libthread-db.


Another problem with your patch is that I'd rather like avoid assuming
that the register buffer is an array of 8-byte registers.

That code already assumems that, and that the values are little-endian.


Andrew



Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]