I'm curious about the little endian case:
+ else /* little-endian */
+ {
+ if ((addr & 3) == 0)
+ {
+ buf[0] = contents_cache[0];
+ buf[1] = contents_cache[1] & 0x7f;
+ buf[2] = bp_entry[1];
+ buf[3] = bp_entry[0];
}
Shouldn't the breakpoint be placed at buf[0] here rather than buf[2]?
For most of architectures - yes, it shold be at buf[0]. But the little endian
mode of M32R is a kind of unique.
In other architectures, two 16-bit instructions, A and B, are placed as
the following:
Big endian:
A0 A1 B0 B1
Little endian:
A1 A0 B1 B0
In M32R, they are placed like this:
Big endian:
A0 A1 B0 B1
Little endian:
B1 B0 A1 A0
This is because M32R always fetches instructions in 32-bit.
So the breakpoint should be placed at buf[2].