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RFC: Add 'double' member to 64-bit vector register type
- From: Jim Blandy <jimb at redhat dot com>
- To: gdb-patches at sources dot redhat dot com
- Date: 19 Mar 2005 01:13:15 -0500
- Subject: RFC: Add 'double' member to 64-bit vector register type
gdb/ChangeLog:
2005-03-17 Jim Blandy <jimb@redhat.com>
* gdbtypes.c (build_builtin_type_vec64): Include a 'double' member
in the union, too, since these registers can hold 64-bit floating
point types.
gdb/testsuite/ChangeLog:
2005-03-17 Jim Blandy <jimb@redhat.com>
* gdb.arch/e500-regs.exp: Expect to see 'dbl' members in ev
registers.
Index: gdb/gdbtypes.c
===================================================================
RCS file: /cvs/src/src/gdb/gdbtypes.c,v
retrieving revision 1.99
diff -c -p -r1.99 gdbtypes.c
*** gdb/gdbtypes.c 24 Feb 2005 13:51:32 -0000 1.99
--- gdb/gdbtypes.c 17 Mar 2005 05:19:43 -0000
*************** build_builtin_type_vec64 (void)
*** 896,901 ****
--- 896,902 ----
union __gdb_builtin_type_vec64
{
int64_t uint64;
+ double dbl;
float v2_float[2];
int32_t v2_int32[2];
int16_t v4_int16[4];
*************** build_builtin_type_vec64 (void)
*** 907,912 ****
--- 908,914 ----
t = init_composite_type ("__gdb_builtin_type_vec64", TYPE_CODE_UNION);
append_composite_type_field (t, "uint64", builtin_type_int64);
+ append_composite_type_field (t, "dbl", builtin_type_double);
append_composite_type_field (t, "v2_float", builtin_type_v2_float);
append_composite_type_field (t, "v2_int32", builtin_type_v2_int32);
append_composite_type_field (t, "v4_int16", builtin_type_v4_int16);
Index: gdb/testsuite/gdb.arch/e500-regs.exp
===================================================================
RCS file: /cvs/src/src/gdb/testsuite/gdb.arch/e500-regs.exp,v
retrieving revision 1.2
diff -c -p -r1.2 e500-regs.exp
*** gdb/testsuite/gdb.arch/e500-regs.exp 15 Jun 2004 18:12:04 -0000 1.2
--- gdb/testsuite/gdb.arch/e500-regs.exp 17 Mar 2005 05:19:47 -0000
*************** gdb_expect {
*** 85,93 ****
# b) the register read (below) also works.
if {$endianness == "big"} {
! set vector_register ".uint64 = 0x100000001, v2_float = .0x0, 0x0., v2_int32 = .0x1, 0x1., v4_int16 = .0x0, 0x1, 0x0, 0x1., v8_int8 = .0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1.."
} else {
! set vector_register ".uint64 = 0x100000001, v2_float = .0x0, 0x0., v2_int32 = .0x1, 0x1., v4_int16 = .0x1, 0x0, 0x1, 0x0., v8_int8 = .0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0.."
}
for {set i 0} {$i < 32} {incr i 1} {
--- 85,93 ----
# b) the register read (below) also works.
if {$endianness == "big"} {
! set vector_register ".uint64 = 0x100000001, dbl = 0x0, v2_float = .0x0, 0x0., v2_int32 = .0x1, 0x1., v4_int16 = .0x0, 0x1, 0x0, 0x1., v8_int8 = .0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1.."
} else {
! set vector_register ".uint64 = 0x100000001, dbl = 0x0, v2_float = .0x0, 0x0., v2_int32 = .0x1, 0x1., v4_int16 = .0x1, 0x0, 0x1, 0x0., v8_int8 = .0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0.."
}
for {set i 0} {$i < 32} {incr i 1} {
*************** for {set i 0} {$i < 32} {incr i 1} {
*** 110,118 ****
# the way gdb works.
if {$endianness == "big"} {
! set decimal_vector ".uint64 = 4294967297, v2_float = .1.*e-45, 1.*e-45., v2_int32 = .1, 1., v4_int16 = .0, 1, 0, 1., v8_int8 = ..000.000.000.001.000.000.000.001.."
} else {
! set decimal_vector ".uint64 = 4294967297, v2_float = .1.*e-45, 1.*e-45., v2_int32 = .1, 1., v4_int16 = .1, 0, 1, 0., v8_int8 = ..001.000.000.000.001.000.000.."
}
for {set i 0} {$i < 32} {incr i 1} {
--- 110,118 ----
# the way gdb works.
if {$endianness == "big"} {
! set decimal_vector ".uint64 = 4294967297, dbl = 0, v2_float = .1.*e-45, 1.*e-45., v2_int32 = .1, 1., v4_int16 = .0, 1, 0, 1., v8_int8 = ..000.000.000.001.000.000.000.001.."
} else {
! set decimal_vector ".uint64 = 4294967297, dbl = 0, v2_float = .1.*e-45, 1.*e-45., v2_int32 = .1, 1., v4_int16 = .1, 0, 1, 0., v8_int8 = ..001.000.000.000.001.000.000.."
}
for {set i 0} {$i < 32} {incr i 1} {