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[committed] Add z9-109 instructions to s390 prolog parser
- From: Ulrich Weigand <uweigand at de dot ibm dot com>
- To: gdb-patches at sourceware dot org
- Date: Mon, 15 Aug 2005 19:38:07 +0200 (CEST)
- Subject: [committed] Add z9-109 instructions to s390 prolog parser
Hello,
the upcoming z9-109 processor adds a couple of new instructions that
may be part of function prolog/epilog sequences. This patch adds
the relevant instructions to the s390 prolog parser.
Tested on s390-ibm-linux and s390x-ibm-linux,
committed to mainline.
Bye,
Ulrich
ChangeLog:
* s390-tdep.c (op1_lgfi, op2_lgfi, op1_agfi, op2_agfi,
op1_afi, op2_afi, op1_algfi, op2_algfi, op1_alfi, op2_alfi,
op1_slgfi, op2_slgfi, op1_slfi, op2_slfi): New opcode enums.
(s390_analyze_prologue): Recognize new z9-109 instructions.
Index: gdb/s390-tdep.c
===================================================================
RCS file: /cvs/src/src/gdb/s390-tdep.c,v
retrieving revision 1.146
diff -c -p -r1.146 s390-tdep.c
*** gdb/s390-tdep.c 24 May 2005 16:12:58 -0000 1.146
--- gdb/s390-tdep.c 13 Jun 2005 14:53:51 -0000
*************** enum
*** 811,816 ****
--- 811,817 ----
{
op1_lhi = 0xa7, op2_lhi = 0x08,
op1_lghi = 0xa7, op2_lghi = 0x09,
+ op1_lgfi = 0xc0, op2_lgfi = 0x01,
op_lr = 0x18,
op_lgr = 0xb904,
op_l = 0x58,
*************** enum
*** 828,838 ****
--- 829,845 ----
op1_stmg = 0xeb, op2_stmg = 0x24,
op1_aghi = 0xa7, op2_aghi = 0x0b,
op1_ahi = 0xa7, op2_ahi = 0x0a,
+ op1_agfi = 0xc2, op2_agfi = 0x08,
+ op1_afi = 0xc2, op2_afi = 0x09,
+ op1_algfi= 0xc2, op2_algfi= 0x0a,
+ op1_alfi = 0xc2, op2_alfi = 0x0b,
op_ar = 0x1a,
op_agr = 0xb908,
op_a = 0x5a,
op1_ay = 0xe3, op2_ay = 0x5a,
op1_ag = 0xe3, op2_ag = 0x08,
+ op1_slgfi= 0xc2, op2_slgfi= 0x04,
+ op1_slfi = 0xc2, op2_slfi = 0x05,
op_sr = 0x1b,
op_sgr = 0xb909,
op_s = 0x5b,
*************** s390_analyze_prologue (struct gdbarch *g
*** 1294,1299 ****
--- 1301,1310 ----
&& is_ri (insn, op1_lghi, op2_lghi, &r1, &i2))
pv_set_to_constant (&data->gpr[r1], i2);
+ /* LGFI r1, i2 --- load fullword immediate */
+ else if (is_ril (insn, op1_lgfi, op2_lgfi, &r1, &i2))
+ pv_set_to_constant (&data->gpr[r1], i2);
+
/* LR r1, r2 --- load from register */
else if (word_size == 4
&& is_rr (insn, op_lr, &r1, &r2))
*************** s390_analyze_prologue (struct gdbarch *g
*** 1434,1439 ****
--- 1445,1470 ----
&& is_ri (insn, op1_aghi, op2_aghi, &r1, &i2))
pv_add_constant (&data->gpr[r1], i2);
+ /* AFI r1, i2 --- add fullword immediate */
+ else if (word_size == 4
+ && is_ril (insn, op1_afi, op2_afi, &r1, &i2))
+ pv_add_constant (&data->gpr[r1], i2);
+
+ /* AGFI r1, i2 --- add fullword immediate (64-bit version) */
+ else if (word_size == 8
+ && is_ril (insn, op1_agfi, op2_agfi, &r1, &i2))
+ pv_add_constant (&data->gpr[r1], i2);
+
+ /* ALFI r1, i2 --- add logical immediate */
+ else if (word_size == 4
+ && is_ril (insn, op1_alfi, op2_alfi, &r1, &i2))
+ pv_add_constant (&data->gpr[r1], (CORE_ADDR)i2 & 0xffffffff);
+
+ /* ALGFI r1, i2 --- add logical immediate (64-bit version) */
+ else if (word_size == 8
+ && is_ril (insn, op1_algfi, op2_algfi, &r1, &i2))
+ pv_add_constant (&data->gpr[r1], (CORE_ADDR)i2 & 0xffffffff);
+
/* AR r1, r2 -- add register */
else if (word_size == 4
&& is_rr (insn, op_ar, &r1, &r2))
*************** s390_analyze_prologue (struct gdbarch *g
*** 1483,1488 ****
--- 1514,1529 ----
pv_add (&data->gpr[r1], &data->gpr[r1], &value);
}
+ /* SLFI r1, i2 --- subtract logical immediate */
+ else if (word_size == 4
+ && is_ril (insn, op1_slfi, op2_slfi, &r1, &i2))
+ pv_add_constant (&data->gpr[r1], -((CORE_ADDR)i2 & 0xffffffff));
+
+ /* SLGFI r1, i2 --- subtract logical immediate (64-bit version) */
+ else if (word_size == 8
+ && is_ril (insn, op1_slgfi, op2_slgfi, &r1, &i2))
+ pv_add_constant (&data->gpr[r1], -((CORE_ADDR)i2 & 0xffffffff));
+
/* SR r1, r2 -- subtract register */
else if (word_size == 4
&& is_rr (insn, op_sr, &r1, &r2))
--
Dr. Ulrich Weigand
Linux on zSeries Development
Ulrich.Weigand@de.ibm.com